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verify

Verify writes to target memory.

Syntax

verify [= true | false]

Where:

true

specifies that memory writes to target memory are verified.

false

specifies that target memory writes are not verified.

Discussion

Use the verify control variable to specify read-back checks on commands that write to target memory. If verify is false, read back checks do not occur. ย The default setting is false.

Setting verify to true detects errors when writing to memory; however, read-back checks increase the time needed to do memory write operations.

Example 1

To display the current value of verify:

Command input:

verify

Result:

false

Example 2

To change verify to true:

Command input:

verify = true

Related Topics: