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cscfg and local_cscfg

Display or change the contents of configuration registers in a chipset device through an ITP debugger interface.
 

Device

Access

Status

Addressing

TBG_CORE

JTAG

Error Status

Error bits set if address given does not map to a valid device address. Bus and Device fields ignored for address mapping error test.

4k configuration space, plus memory mapped addressing. Has transaction-type field, it can be 0 or 1. 

TNB

JTAG

Error bit has known problem in certain register address ranges.  DE recommends ignoring it. ITP does not test it.

4k configuration space, no memory mapped addressing. No transaction-type field. If system transaction flow results in a stuck or hung PCI bus access, the cscfg command can also be hung. Use the local_cscfg command with the same syntax to work around such hangs.

XMB

JTAG

Error bit set if address given does not map to a valid device address. Bus and Device fields ignored for address mapping error test.

4k configuration space, no memory mapped addressing. No transaction-type field. Does not support the JCONFG instruction register. ITP maps both cscfg and local_cscfg to the JCONFL instruction register.

PXH

JTAG

Error bit not implemented, always 0.

4k configuration space, no memory mapped addressing. Has Transaction-type field but it is always 0

LHMCH (Cayuse)

JTAG

Error bit not implemented, always 0.

4k configuration space, plus memory mapped addressing. Has Transaction-type field, it can be 0 or 1.

Syntax:  

Enter the command with required parameters, which must be in parentheses, to read the contents of a register. Add the assignment operator (=) and an expression to the command sequence to write to the register. Use the command local_cscfg instead of cscfg, with the same syntax, if the device supports it and if the register to access is within the device (the register must not need to be forwarded to another device). The local_cscfg form of the command is only available on certain devices. See the table above to determine whether the device has local_cscfg capability.  

If the command entered has missing or extra parameters for the device specified in the device_number field, an error will be displayed.

This command may be issued while the processor is running, accesses are asynchronous to any system software operations. The user is expected to resolve JTAG and system software access synchronization issues.

The user is expected to refer to the device component specification configuration registers to determine which PCI bus/device/function/offset or linear/mapped/test register address to issue when accessing a particular device, and to understand how each device may respond to invalid register access address input. For example, given an invalid register address, some devices return all 0's in the data field while others return a JTAG error bit. If an error is returned by the chipset, ITP will propagate this error back to the user.
 

For Tylersburg TBG_CORE device:

cscfg(device_number, transaction_type, register_address, pci_bus_number, pci_device_number, pci_function_number, byte_enab)[=expr]

Where:

device_number

is the ITP Device ID (DID) or alias.

transaction_type

is an expression that evaluates to a 1-bit valid transaction access type: value of 0b specifies the configuration space registers type and uses bus, device, function, and address; value of 1b specifies the memory mapped registers type and uses region and address.

register_address

is an expression that evaluates to a 12-bit valid chipset configuration space address. For a memory mapped transaction type, this field evaluates to a 32-bit memory mapped address. The high order 8 bits specify the region (MEM_HIGH higher nibble , MEM_LOW lower nibble) and the lower 24 bits specify the address.

pci_bus_number

is an expression that evaluates to an 8-bit value, representing the PCI Bus Number for the configuration space register. Pass the value 0 for this parameter when using the memory mapped transaction type.

pci_device_number

is an expression that evaluates to a 5-bit value, representing the PCI Device Number for the configuration space register. Pass the value 0 for this parameter when using the memory mapped transaction type.

pci_function_number

is an expression that evaluates to a 3-bit value, representing the PCI Function Number for the configuration space register. Pass the value 0 for this parameter when using the memory mapped transaction type.

byte_enable

is an expression that evaluates to a 2-bit value, representing the Byte Enable field of the JTAG data register used for PCI configuration space access. For reads, if this value is not the correct read operation code (00b), it will automatically be set to 00b.

expr

is an expression that evaluates to a 32-bit value, for the data field for the PCI configuration space register.

 

For Lindenhurst MCH, PXH, Twincastle TNB, XMB, Blackford BNB, Clarksboro CNB, Seaburg SNB, San Clemente SCNB, GB, ESB2, Tolapai TLP devices:

cscfg(device_number, [transaction_type,] register_address, pci_bus_number, pci_device_number, pci_function_number, byte_enab)[=expr]

Where:

device_number

is the ITP Device ID (DID) or alias.

transaction_type (Lindenhurst MCH, PXH only)

is an expression that evaluates to a 2-bit valid transaction access type: value of 00b specifies the configuration space registers type and uses bus, device, function, and address; value of 01b specifies the memory mapped registers type and uses region and address.

register_address

is an expression that evaluates to a 12-bit valid chipset configuration space address. For a memory mapped transaction type, this field evaluates to an 18-bit memory mapped address. The high order 6 bits specify the region and the lower 12 bits specify the address.

pci_bus_number

is an expression that evaluates to an 8-bit value, representing the PCI Bus Number for the configuration space register. Pass the value 0 for this parameter when using the memory mapped transaction type.

pci_device_number

is an expression that evaluates to a 5-bit value, representing the PCI Device Number for the configuration space register. Pass the value 0 for this parameter when using the memory mapped transaction type.

pci_function_number

is an expression that evaluates to a 3-bit value, representing the PCI Function Number for the configuration space register. Pass the value 0 for this parameter when using the memory mapped transaction type.

byte_enable

is an expression that evaluates to a 2-bit value, representing the Byte Enable field of the JTAG data register used for PCI configuration space access. For reads, if this value is not the correct read operation code (00b), it will automatically be set to 00b.

expr

is an expression that evaluates to a 32-bit value, for the data field for the PCI configuration space register.

 

For 82870 devices:

cscfg(device_number, reg_addr, bus_number, dev_function, byte_enab)[=expr]

Where:

device_number

is the ITP Device ID (DID) or alias.

reg_addr

is an expression that evaluates to a valid chipset PCI configuration space register address.

bus_number

is an expression that evaluates to an 8-bit value, representing the PCI Bus Number for the configuration space register.

dev_function

is an expression that evaluates to an 8-bit value, which is a combined field for PCI Device and PCI Function for the configuration space register. The lower 3 bits are for the Function field, and the upper 5 bits are for the Device field.

byte_enable

is an expression that evaluates to a 2-bit value, representing the Byte Enable field of the JTAG data register used for PCI configuration space access. See discussion for more details on this parameter. For reads, if this value is not the correct read operation code (00b), it will automatically be set to 00b.

expr

is an expression that evaluates to a 32-bit value, for the data field for the PCI configuration space register.

Discussion

JTAG:

Use the cscfg command for data transfers using JTAG access to chip-set device PCI configuration register space. This command can be used to configure any PCI configuration space registers that are accessible via the JTAG PCI config access register, usually this includes the full register space of each chipset device. The chipset device specification defines details and limitations. When reading the configuration register, a 32-bit data value is displayed or returned. For TNB, use the cscfg to access PCI configuration registers both on the device and directed to another device in the system, such as the PXH.

The byte_enable parameter specifies the first two bits of the 3-bit field: 00b = dword (read), 01b = byte (write), 10b = word (write), and 11b = dword (write). The third bit of the field is set when the command is issued without an assignment (read syntax) and reset when the command is issued with an assignment (write syntax). NOTE: ITP will not issue a warning if a write byte_enable is specified during a read or if a read byte_enable is specified during a write.

The JTAG PCI Configuration access register has a "busy" bit which ITP polls when accessing registers. If the access times out, ITP will issue an error. See the ITP help for ini file timeouts for details on length of timeout or changing the default value.

Example 1

82870 devices:

To read/modify some chip-set registers using the ITP command language features:

Command input:

#define  SNC_DEV_VID_OFFSET 0

#define SIOH_DEV_VID_OFFSET 0

 

#define  SNC_SPAD_OFFSET 0xc4

#define SIOH_SPAD_OFFSET 0xb0

 

#define  SNC_PCI_DEV_NUM 0x18  /* assignment on Tiger platform */

#define SIOH_PCI_DEV_NUM 0x1C  /* assignment on Tiger platform */

 

#define  SNC_SPAD_FCN   0

#define SIOH_SPAD_FCN   0n5

 

#define  SNC_PLAIN_DEV_FCN  (SNC_PCI_DEV_NUM * 0x8) /* initially, C0 */

#define SIOH_PLAIN_DEV_FCN (SIOH_PCI_DEV_NUM * 0x8) /* initially, E0 */

 

#define  SNC_SPAD_DEV_FCN  ((SNC_PCI_DEV_NUM * 0n8) +  SNC_SPAD_FCN)

#define SIOH_SPAD_DEV_FCN ((SIOH_PCI_DEV_NUM * 0n8) + SIOH_SPAD_FCN)

 

#define TIGER_BUS_NUM 0xff

 

#define SNCM_DEV_VID_VALUE 0x05008086

#define SIOH_DEV_VID_VALUE 0x05108086

 

#define BYTE_WRITE  1

#define WORD_WRITE  0n2

#define DWORD_WRITE 0n3

#define DWORD_READ  0

Result:

// get the read-only DEVICE and VENDOR ID values, check them

o4Result = cscfg(SNCM0, SNC_DEV_VID_OFFSET, TIGER_BUS_NUM, SNC_PLAIN_DEV_FCN, DWORD_READ)

if (SNCM_DEV_VID_VALUE != o4Result)

{

    printf("Bad dword value from readonly SNCM0 Device/Vendor ID register\n")

            printf(" Expected: %08D     Actual: %08D\n", SNC_DEV_VID_VALUE, o4Result)

}

 

// write, read the SNC device scratch-pad register

cscfg(SNCM0, SNC_SPAD_OFFSET, TIGER_BUS_NUM, SNC_SPAD_DEV_FCN, DWORD_WRITE) = 0xdeadbeef

o4Result = cscfg(SNCM0, SNC_SPAD_OFFSET, TIGER_BUS_NUM, SNC_SPAD_DEV_FCN, DWORD_READ)

if (0xdeadbeef != o4Result)

{

    printf("Bad dword read or write from SNCM0 scratch-pad register\n")

            printf(" Expected: %08D     Actual: %08D\n", 0xdeadbeef, o4Result)

}

Example 2

82870 device:

To show an error caused by the device_number being larger than the available devices in the current ITP scan chain:

Command input:

cscfg(num_jtag_devices+1, 1, 1, 0x78, 0)

ERROR #6418

Result:

NMI: Device was not found

Example 3

Using ITP devicelist command to list device aliases available:

Use the devicelist command to view aliases of all the available devices in the current ITP scan chain. The example scan chain shows an unlikely system configuration to illustrate all the Twincastle and Lindenhurst device names.

Command input:

devicelist

Result:

Brd  DP   CP   Device Alias       Idcode-Step    Type      ThreadId  IsEnabled

------------------------------------------------------------------------------

0    0    0    PRES0  PRES00      08304013-A0    PRESCOTT      0        Yes

0    0    1    PRES1  PRES10      08304013-A0    PRESCOTT      1        Yes

0    0    2    TNB    TNB0        0a100013-A0    TNB           0        Yes

1    1    3    XMB    XMB0        0a101013-A0    XMB           0        Yes

1    1    4    PXH    PXH0        00500013-A0    PXH           0        Yes

2    2    5    PRES0  PRES01      08304013-A0    PRESCOTT      0        Yes

2    2    6    PRES1  PRES11      08304013-A0    PRESCOTT      1        Yes

2    2    7    LHMCHPFLHMCHPF0    01102013-A0    LHMCHPF       0        Yes

2    2    8    TWMCHWSTWMCHWS0    01105013-A0    TWMCHWS       0        Yes

2    2    9    LHMCH4PLHMCH4P0    01104013-A0    LHMCH4P       0        Yes

2    2    10   LHMCHMRLHMCHMR0    01103013-A0    LHMCHMR       0        Yes

3    3    11   PXH    PXH1        00500013-A0    PXH           0        Yes

 

Example 4

Another use of the devicelist command to view aliases of all the available JTAG devices in the current ITP scan chain:

Command input:

define ord1 i

for (i=0; i< num_jtag_devices; i++)

   {

      devicelist[i].alias

   }

Result:

PRES00

PRES10

TNB0

XMB0

PXH0

PRES01

PRES11

LHMCHPF0

TWMCHWS0

LHMCH4P0

LHMCHMR0

PXH1

Example 5

Reading register 0x10 on bus 0, device 1, function 2, Lindenhurst device, using bus/dev/function addressing:

Command input:

cscfg(LHMCHPF0, 0, 0x10, 0, 1, 2, 0)

Example 6

Reading a register at 0x3ffff on Lindenhurst device, using memory-mapped addressing:

Command input:

cscfg(LHMCHPF0, 1, 0x3ffff, 0, 0, 0, 0)

Example 7

Reading register 0x10 on bus 0, device 1, function 2, TNB device, using bus/dev/function addressing:

Command input:

cscfg(TNB0, 0x10, 0, 1, 2, 0)

Example 8

Reading the same register on both channels of a PXH device, using bus/dev/function addressing:

Command input:

csdebugchain(PXH0) = 0x40           // force accesses to A side

cscfg(PXH0, 0x10, 0, 1, 2, 0)       // access register

csdebugchain(PXH0) = 0              // switch accesses to B side

cscfg(PXH0, 0x10, 0, 1, 2, 0)       // access same register, other side

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