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A Trio of Webinars on x86 JTAG-based Debugging

Alan Sguigna
Alan Sguigna
  • 5:23 pm
For each of the months of January, February and March, I did a webinar on JTAG-based debugging. Since each of the video recordings are about 45 minutes long, I thought it would be helpful to point out the highlights of each, if you don’t have time to sit through the full durations. At the risk of sounding immodest, there are some real gems of information within the demos of each webinar.

Webinar: Embedded @Scale JTAG-based Debug of x86 Servers

Alan Sguigna
Alan Sguigna
  • 4:20 pm
Beginning with Microsoft Azure's Project Olympus, and now a standard within the Open Compute Project, many datacenter servers are now optionally equipped with hardware connectivity between the platform BMC and CPU scan chain. The BMC can thus act as an autonomous JTAG-based embedded out-of-band debug agent, provide low-level triage of system events, such as crashes and hangs. Other use cases, such as hardware validation, manufacturing test, and forensics telemetry are also enabled by this technology.

Webinar: Intel Architectural Event Trace

Alan Sguigna
Alan Sguigna
  • 2:16 pm
Don't miss it! ASSET's Alan Sguigna (that's me), in collaboration with the UEFI Forum, will be presenting and demonstrating SourcePoint using the Intel Architectural Event Trace (AET) feature, which offers an unparalleled level of insight into x86 event generation and code execution.

The UP Squared Chronicles Episode 3: Intel Processor Trace

Alan Sguigna
Alan Sguigna
  • 8:31 am
Wow! It has been a while. I wrote Episode 2 of my open-source explorations into the AAEON Intel Apollo Lake-based Up Squared board back on June 7th. In that episode, I gave directions on how to build the UEFI debug image for the board, complete with source/symbols for consumption by JTAG debuggers like SourcePoint. In this episode, I show source-level debug with SourcePoint, and take advantage of Intel Processor Trace on the board.

Coding to the SED API: Part 4

Alan Sguigna
Alan Sguigna
  • 4:52 pm
In Part 3 of this series, we did a code review of “ltloop”, a utility firmware application that uses the BMC to do out-of-band stress tests of PCI Express ports. In this article, we begin to examine a more general-purpose application that uses JTAG to extract register, memory and IO contents of the target. This On-Target Diagnostic (OTD), called “libtest”, is used by ASSET to test the functionality of run-control on new targets.
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