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Last week, I wrote an introduction to Architectural Event Trace, an extremely powerful JTAG-based Trace facility within current Intel silicon. Using this technology in conjunction with SourcePoint gives the firmware developer unprecedented insight into program execution and events. This week, I look at some of the use cases.
Yes, Intel Skylake-EP, also known as Skylake-SP, or Purley, or Intel Xeon Scalable Processor, is past the “line of demarcation”; which means some more of its powerful capabilities can be revealed in the public domain. I managed to get my hands on a server platform with this CPU, and looked at some of the advanced debug and trace capabilities within the silicon.
Today, February 15th, 2020, marks the official 30th Anniversary of JTAG. What a wild ride it has been – from its humble beginnings for detecting short and open circuits, it has evolved to be, in some ways, the most powerful and feared technology on the planet. How did we get here?
In my spare time, I was doing some OpenBMC Yocto builds on my Linux machines, and decided I wanted to copy these files over to my Windows PC. Little did I know how complicated this could be.
In Episode 2 of the Basys Chronicles, I configured (programmed) the Artix-7 FPGA with a simple Binary-to-Decimal calculator application, through the USB-JTAG port. But, power down the Basys 3, and it goes back to the Built-In Self Test that comes with the board. This week, I flashed the calculator configuration into the nonvolatile SPI flash, making it the default boot-up configuration.
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