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Category: Industry Standards and Forums

IEEE 1687 (IJTAG): ICL and PDL Explained

Alan Sguigna
Alan Sguigna
  • 1:40 pm
With IEEE 1687 (aka IJTAG) making its way into a great many chips as a mainstream mechanism for access and control of embedded instrumentation, I’ve taken an interest in explaining this often complicated technology in simple terms. I’ll start with describing the syntax, semantics and overall structure of Instrument Connectivity Language (ICL) and Procedural Description Language (PDL).

IEEE 1149.1-2013: Excludable Segments

Alan Sguigna
Alan Sguigna
  • 5:25 pm
The 2013 Revision of the IEEE 1149.1 Standard incorporates support for dynamic data registers that can change in length and organization, unlike those fixed ones specified by the 2001 Revision. This allows, for example, definition of “excludable segments” for the boundary scan register (BSR); perfect for dealing with BSR segments in different power domains, some powered up and some not. How does this work?

Test Generation for “Chiplet”-based, Multi-die Devices Is Now Possible with ScanWorks

Michael Johnson
Michael Johnson
  • 1:28 pm
Since its inception, ScanWorks has provided board-level shorts and opens testing of interconnects between Boundary-Scan devices through use of its Automatic Test Pattern Generation (ATPG) feature. ScanWorks ATPG creates the patterns necessary for shorts and opens testing based on the board topology (i.e. connections between devices) and the Boundary-Scan Cell types on the I/O pins within each device. With recent enhancements, ScanWorks can now generate patterns that can be applied by chip-level automatic test equipment (ATE) to test for shorts and opens in the interconnections between silicon “chiplets” in multi-die devices.

It’s JTAG’s 30th Anniversary!

Alan Sguigna
Alan Sguigna
  • 3:29 pm
Today, February 15th, 2020, marks the official 30th Anniversary of JTAG. What a wild ride it has been – from its humble beginnings for detecting short and open circuits, it has evolved to be, in some ways, the most powerful and feared technology on the planet. How did we get here?

Using JTAG for Silicon Trojan Detection and Mitigation

Alan Sguigna
Alan Sguigna
  • 11:53 am
This past week, I attended the AUTOTESTCON 2019 conference, the premiere Defense Automated Test Equipment show, that has the theme of “increased mission effectiveness through advanced test and support technology”. As you may have seen, I was honored with the “Walter E. Peterson Best Paper on New Technology” award for Mitigating JTAG as an Attack Surface (note: it might take a little while for the paper to be posted on IEEE Xplore; you might have to check back later).
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