As I mentioned in my last blog, the US government passed the CHIPS and Science Act in 2022, investing billions of dollars to support semiconductor production coming back to the US and incentives for future R&D investments so the USA continues to be a leader in this technology area. This started a wave of other CHIPS acts across the globe. So, money is flowing, but in semiconductors you need a host of engineering talent to convert dollars into chips. Semiconductors rely on electrical engineers for design and test, chemical engineers to optimize the process, mechanical engineers to design handling equipment to automate the factory and other engineers and technical people to support a clean room strategy to keep dust particles out of the air as another example. That is a lot of diverse technical talent that needs to be delivered by US universities. Are they up for the challenge? Are they even working on it?
Figure 1: Test Engineers of the Future?
Semiconductor Test Engineers
Since ASSET is focused on board and system test plus with our IJTAG technology work moving forward toward providing value to Design-For-Test (DFT) and IC ATE engineers with this technology, then I’ll focus on DFT/IC Test Engineering. In my research so far (and I’ll admit it is not exhaustive so if anyone has data to share with me, please do) the major universities that have Engineering Colleges typically have Electrical Engineering (EE) degree offerings. This is great and usually is focused on the theory of electrical engineering and the basics for a bachelor’s degree. I know of one school, Texas A&M University, that also offers in addition to an EE degree, an Electrical Systems Engineering Technology (ESET) degree that is different from the normal EE degree. Its focus is very much hands-on applications from designing a printed-circuit board, to writing embedded code and has a class in developing a test program on an IC Tester! Now IC Testers are big and expensive so very difficult for an engineering school to purchase one. In this case, Texas Instruments as I understand it, donated the tester to help seed the class. TI clearly understands that as they build new fabs here in Texas that they will need a new wave of IC ATE test engineers so has made the strategic investment in partnership with Texas A&M to help encourage students to learn about this field and job opportunities.
Figure 2: Electronics Test Class offered as part of ESET Degree
Way to go TI (full disclosure I worked at TI the first 13 years of my career) in making this commitment! Of course, it is in the company’s long-term interest as it hopes this becomes a pipeline of future TI test engineers. But this is just a small step in the market need going forward. We need new students to learn electronics, whether in getting an EE or ESET type degree. Those are very important and valuable. Might I suggest that schools could start to offer a minor in test engineering as a first step and maybe some could go all the way with a major in DFT/Test engineering. But I think a good start would be a minor to get more students exposed to test engineering and make this job opportunity visible.
The normal focus of an EE degree is toward design learning which is fine but, test engineering is really cool and let me explain why?
It’s Cool to be a Test Engineer
The test engineer is not only a critical technology position in the company, but also a critical revenue position for a company. Design engineers are measured at a high-level of delivering functional/performance value and meeting a design schedule plus hopefully making a design you can manufacture and test. The test engineer is making sure quality parts are being shipped. Parts shipped drive revenue for the company thus it is both a key technical position and a very impactful business role.
Test engineers need to understand at a very detailed level the total design and product. They must have some skills in hardware design to design a load or probe board for an IC ATE. If the focus is on the DFT side, then they need to learn tools like Siemens Tessent or other DFT tools from Synopsys or Cadence. They need to know how to program an IC tester and/or write chip specific embedded code to help test some functionality plus work with design on helping make the design testable. If you like to nerd out on technology, want diversity of a job, and never the same old, same old this job is for you. Chip and design technology is always changing as we have the execution of Moore’s law changing and now morphing into a Chiplet design methodology, where we are beginning to see the merger of both chip and board test methods.
The test engineer always needs to be learning and enhancing the person’s knowledge across many domains so a great challenging and fulfilling career choice that makes a very important impact to the business. Thus, why it’s Cool to be a Test Engineer!
Figure 3: Can the US CHIP Acts fund a few of these to be deployed to Engineering Colleges?
What’s Next for Semiconductor Test
The “devils in the details” of how the US begins to build a pipeline of new test engineering talent. It starts in the engineering colleges and more collaboration with industry. As I mentioned, an IC ATE is very expensive piece of capital equipment so maybe within the CHIPS act some money could be used to fund deployment of Teradyne and Advantest IC ATEs to a few engineering colleges, assuming those colleges would commit to at least one semester of an IC ATE course. Software to engineering colleges is a bit easier, so for a future blog I’ll begin to explore what is going on with our EDA DFT business unit friends and engineering college programs. At ASSET, as we ramp up our IJTAG offering we are very open to working together with engineering schools to help the next generation of test engineers. We will be looking forward to those opportunities as we make progress.
I’ll keep looking at this issue of growing test engineering talent and blogging about initiatives I see that are helping as there is going to be a big need as all these fabs come online in this decade. More later and if you have any input, please share them with me.
