Category: Industry Standards and Forums

In my last article, I described how the Open Compute Project (OCP) Project Olympus server designs have been put into the public domain by Microsoft Azure. Inherent in the Olympus servers is the hardware connection between the ASPEED BMC and the CPU JTAG chain. To make the most of this connection for hardware-assisted debug and test purposes, a high-performance, secure JTAG Master function is needed within the BMC.
In two previous articles, I looked at the JTAG access port from a security perspective, and considered what exposure the choice of BMC operating system might have on a platform supporting At-Scale Debug. Now, let’s consider the root of all trust, the silicon itself, and see what options exist for locking it down.
I spent the past two days at the Open Compute Project (OCP) U.S. Summit 2017, in Santa Clara, California. The HUGE news is that Microsoft has ported Windows Server to ARMv8 chips from Qualcomm and Cavium (but, for now, only for use within Azure).
ASSET’s Michael Johnson presented an update on Non-intrusive Board Test (NBT) at the 13th Annual Board Test Workshop (BTW) in Fort Collins, CO this past week. The overall question posed at the Workshop was, “Is Board Test Losing Relevance”?
The MSP430 is a mixed-signal microcontroller family from Texas Instruments. Built around a 16-bit CPU, the MSP430 is designed for low cost, low power consumption embedded applications. But, does it support boundary scan for board test purposes?
As the UEFI Forum continues to make advances in the technology behind what is still called the BIOS (Basic Input/Output System), ASSET has joined this standards body to assist in the debug of its latest features.
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