Category: FPGA-Controlled Test (FCT)

In Episode 2 of the Basys Chronicles, I configured (programmed) the Artix-7 FPGA with a simple Binary-to-Decimal calculator application, through the USB-JTAG port. But, power down the Basys 3, and it goes back to the Built-In Self Test that comes with the board. This week, I flashed the calculator configuration into the nonvolatile SPI flash, making it the default boot-up configuration.
In the Basys Chronicles Episode 1, I started to learn about FPGA programming using Xilinx’s Vivado tool and the Digilent Basys 3 Trainer Board. Now, after a few weeks (okay, time flies; it’s been almost two months), I’ve made some good headway in understanding FPGA architecture and creating some interesting designs that do useful things.
We announced today the extended integration of ScanWorks’ boundary-scan test capabilities with the Teradyne’s PXI Express-based High Speed Subsystem (HSSub). Come see a demo at Booth #101 at the AUTOTESTCON conference!
ASSET’s Michael Johnson presented an update on Non-intrusive Board Test (NBT) at the 13th Annual Board Test Workshop (BTW) in Fort Collins, CO this past week. The overall question posed at the Workshop was, “Is Board Test Losing Relevance”?
In recent years, the increasing size of flash memory has driven device programming to offline methods. However, new techniques are significantly reducing in-system programming times, making it much more feasible and convenient to program flash memory after it’s already been soldered to the board.
As described in earlier blogs, the new Intel Innovation Engine (IE) makes an ideal host for validation, debug, trace and test applications on Intel platforms. This article details the implementation of a JTAG execution engine on the IE for the purposes of printed circuit board structural and functional testing.