Category: FPGA-based Fast Programming (FFP)

Recently as ASSET is a 3rd party tool supporter of Xilinx FPGAs for a number of applications, I was reviewing the Xilinx community seeing a lot of users trying to use Vivado and Platform Cable USB II pod for production in-system programming with less-than-optimal results or no results at all. First, Xilinx says the Platform Cable USB II with Vivado/SDK as the UI, is to be used for prototype programming and is a design tool, not a production tool.
Watching a product mature is a great experience. Working with ScanWorks for over 15 years has provided a unique opportunity to assist in the maturation process from a point solution to that of a platform. Most of my experience has been in taking business opportunities and developing other tools that start out addressing a customer or niche market needs. These adventures almost always end in a point tool. After product deployment and working with more and more customers, the product evolves to the point but, too often there it is still missing a little something. Then looking at the products in-house you find the missing piece. By extending an interface here and there, you begin to see how to integrate tools together within the architecture and that provide a much better problem-solving solution and better user experience. ScanWorks had evolved to a world-class boundary scan test tool. To make it better, it needed to evolve into a platform where other tools could interface using the same target connection infrastructure, JTAG. Here are examples of two such point tools that are being integrated within ScanWorks. These and other features make ScanWorks a world-class tool and platform by enabling functional test and FPGA embedded instruments.
In Episode 2 of the Basys Chronicles, I configured (programmed) the Artix-7 FPGA with a simple Binary-to-Decimal calculator application, through the USB-JTAG port. But, power down the Basys 3, and it goes back to the Built-In Self Test that comes with the board. This week, I flashed the calculator configuration into the nonvolatile SPI flash, making it the default boot-up configuration.
In the Basys Chronicles Episode 1, I started to learn about FPGA programming using Xilinxโ€™s Vivado tool and the Digilent Basys 3 Trainer Board. Now, after a few weeks (okay, time flies; itโ€™s been almost two months), Iโ€™ve made some good headway in understanding FPGA architecture and creating some interesting designs that do useful things.
We announced today the extended integration of ScanWorksโ€™ boundary-scan test capabilities with the Teradyneโ€™s PXI Express-based High Speed Subsystem (HSSub). Come see a demo at Booth #101 at the AUTOTESTCON conference!
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