Embedded Diagnostics Archives

Coding to the SED API: Part 4

Alan Sguigna

October 18, 2020
4:52 pm

In Part 3 of this series, we did a code review of “ltloop”, a utility firmware application that uses the BMC to do out-of-band stress tests of PCI Express ports. In this article, we begin to examine a more general-purpose application that uses JTAG to extract register, memory and IO contents of the target. This On-Target Diagnostic (OTD), called “libtest”, is used by ASSET to test the functionality of run-control on new targets.

Coding to the SED API: Part 3

Alan Sguigna

September 20, 2020
7:56 pm

In the last article on this topic, we did a dive into the main routine of the lt_loop JTAG-based On-Target Diagnostic, seeing the overall flow of the program. In this article, we’ll look at the routine that does the heavy lifting for retraining the PCI Express link and checking for errors.

Coding to the SED API: Part 2

Alan Sguigna

September 7, 2020
3:35 pm

In my previous blog, I did a walkthrough of the source code for main() within the ltloop JTAG-based on-target diagnostic. This article covers main() in more detail, and provides insight into some of the operations of the utility functions and data structures.

Coding to the SED API: Part 1

Alan Sguigna

August 30, 2020
4:11 pm

In my UEFI Forum webinar, I demonstrated a utility function for stressing PCI Express ports at-scale using JTAG. Let’s walk through the source code and see how it works under the hood.

Debugging Intel CATERR using Embedded ITP

Alan Sguigna

July 26, 2020
8:44 pm

In my webinar with the UEFI Forum, I demonstrated some of the utility of using JTAG functionality within BMCs to perform out-of-band debug. This is a tutorial on the coding practices to use the SED API.

PCI Express LTSSM stress using BMC-based Embedded JTAG/ITP

Alan Sguigna

July 19, 2020
4:27 pm

This past week, I did a webinar in collaboration with the UEFI Forum on JTAG-based UEFI Debug and Trace. This reviewed some of the often-used tools for low-level triage of difficult-to-diagnose, intermittent bugs. Near the end, I demonstrated the usage of technology running directly down on a BMC to perform low-level functions not achievable with firmware or OS-based applications.

It’s JTAG’s 30th Anniversary!

Alan Sguigna

February 15, 2020
3:29 pm

Today, February 15th, 2020, marks the official 30th Anniversary of JTAG. What a wild ride it has been – from its humble beginnings for detecting short and open circuits, it has evolved to be, in some ways, the most powerful and feared technology on the planet. How did we get here?

Benchmarking Yocto OpenBMC Builds on AWS Part 2: Arm64, Intel and AMD

Alan Sguigna

January 5, 2020
12:41 pm

In Part 1, I compared the performance and cost of Intel Cascade Lake versus AMD Rome. How does Amazon’s own CPU, Graviton, fare in this benchmark?

Benchmarking Yocto OpenBMC Builds on AWS Part 1: Intel Cascade Lake versus AMD Rome

Alan Sguigna

December 26, 2019
4:39 pm

As you know, I’ve done a lot of OpenBMC builds on my AMD Ryzen desktop PC, as well as my Surface Pro 6. I decided to tackle the same builds on Amazon Web Services (AWS), on virtual machines based on the Intel Cascade Lake CPU, as well as the AMD EPYC 7000. Which one is faster and cheaper?

Copying large files from Linux to Windows

Alan Sguigna

December 1, 2019
10:43 am

In my spare time, I was doing some OpenBMC Yocto builds on my Linux machines, and decided I wanted to copy these files over to my Windows PC. Little did I know how complicated this could be.

Category: Embedded Diagnostics

Coding to the SED API: Part 4

Coding to the SED API: Part 3

Coding to the SED API: Part 2

Coding to the SED API: Part 1

Debugging Intel CATERR using Embedded ITP

PCI Express LTSSM stress using BMC-based Embedded JTAG/ITP

It’s JTAG’s 30th Anniversary!

Benchmarking Yocto OpenBMC Builds on AWS Part 2: Arm64, Intel and AMD

Benchmarking Yocto OpenBMC Builds on AWS Part 1: Intel Cascade Lake versus AMD Rome

Copying large files from Linux to Windows

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