Category: Embedded Diagnostics

BMC-Assisted Debug

Alan Sguigna

January 2, 2017
5:20 pm

Run-control technology is rapidly becoming a de facto standard for forensics retrieval within high-availability, Intel Xeon-class servers. How did this standard come to be established?

At-Scale Debugging

Alan Sguigna

December 18, 2016
2:24 pm

The conventional approach to hardware-assisted debugging on Intel platforms involves physically connecting an external probe to the target. Is there a better way?

Using Embedded Run-Control for PCIe Link Testing – Part 2

Alan Sguigna

December 4, 2016
11:19 pm

In my last blog, I referred to the use of run-control technology to very quickly exercise the PCI Express link training state machine. What other kinds of tests can be run with this approach?

Using Embedded Run-Control for PCIe Link Training Testing

Alan Sguigna

November 6, 2016
5:43 pm

It is often part of a hardware validation test suite to initiate multiple PCIe bus retrains, looking for hardware design issues, or LTSSM RTL bugs in the device under test. These test suites take a very long time to run. Is there a way to speed them up?

Using Trace to Diagnose the Blue Screen of Death (BSOD)

Alan Sguigna

October 30, 2016
8:32 pm

One in 10,000 times, your notebook crashes when you wake it up in the middle of a backup of your hard disk. No big deal?

Dumping Intel MSRs from Crashed Systems Remotely using Embedded ITP

Alan Sguigna

August 28, 2016
4:02 pm

When an x86 system has crashed, gathering forensics data to help diagnose root-cause of the failure is a top priority. But, how is this done if the system has crashed, and OS/BIOS-based application programs cannot access the platform?

The Third Type of JTAG Access on Intel-based Designs

Alan Sguigna

July 31, 2016
4:22 pm

In my last blog, I introduced the three types of JTAG access for debug applications. This article delves into the third type, Embedded ITP.

The Three Types of JTAG Access on Intel-based Designs

Alan Sguigna

July 24, 2016
5:02 pm

Pop quiz: there are three main mechanisms to access debug embedded instrumentation within Intel silicon. What are they?

ASSET joins the Open Compute Project

Alan Sguigna

July 17, 2016
2:49 pm

The mission of the Open Compute Project (OCP) is to design and enable the delivery of the most efficient server, storage and data center hardware designs for scalable computing. ASSET has just joined the OCP to contribute to the reliability and availability of OCP designs.

Remote CScripts application using the Emulex Pilot4 BMC

Alan Sguigna

April 10, 2016
4:08 pm

In a previous blog, I described how the ScanWorks Embedded Diagnostics (SED) utility runs Intel CScripts nearly as fast as legacy methods. This applies in particular using the Emulex Pilot4 BMC, with its on-chip JTAG Master.

Category: Embedded Diagnostics

BMC-Assisted Debug

At-Scale Debugging

Using Embedded Run-Control for PCIe Link Testing – Part 2

Using Embedded Run-Control for PCIe Link Training Testing

Using Trace to Diagnose the Blue Screen of Death (BSOD)

Dumping Intel MSRs from Crashed Systems Remotely using Embedded ITP

The Third Type of JTAG Access on Intel-based Designs

The Three Types of JTAG Access on Intel-based Designs

ASSET joins the Open Compute Project

Remote CScripts application using the Emulex Pilot4 BMC

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