Category: Embedded Diagnostics

The conventional approach to hardware-assisted debugging on Intel platforms involves physically connecting an external probe to the target. Is there a better way?
It is often part of a hardware validation test suite to initiate multiple PCIe bus retrains, looking for hardware design issues, or LTSSM RTL bugs in the device under test. These test suites take a very long time to run. Is there a way to speed them up?
The mission of the Open Compute Project (OCP) is to design and enable the delivery of the most efficient server, storage and data center hardware designs for scalable computing. ASSET has just joined the OCP to contribute to the reliability and availability of OCP designs.
In a previous blog, I shared some prospective information on the real-time performance of Intel CScripts, when run on our SourcePoint debugger, versus legacy methods. This article contains quantitative measurements, and supports the theory that SourcePoint yields much higher throughput.