Category: Embedded Diagnostics

As part of the Open Compute Project, Microsoft Azure is leading the charge in providing the technical information needed to democratize the server industry. Recently, they put into the public domain the full schematics and board files for an Intel Xeon Scalable Processor (Skylake-EP) server design. Reviewing the schematics provides great insight into the hardware design implementation needed to support at-scale debug via embedded JTAG run-control.
In Episode 24, I finished off my new build machine, successfully did a QEMU image build on it, and loaded an off-the-shelf Ubuntu image into my new MinnowBoard Turbot. This week, I tackled a MinnowBoard Linux image build using Yocto, loaded it into my MinnowBoard, and also set about doing a Yocto image build for the Portwell Neptune Alpha board. But I ran into some problems.
The news is out! Intel today announced its Intel Xeon Processor Scalable Family, codenamed Purley or Skylake-EP. ASSET of course has supported this silicon since its earliest beginnings, with the SourcePoint and ScanWorks Embedded Diagnostics products. Read the full press release here: ASSET releases new benchtop and remote debugging applications for Intel Xeon Processor Scalable Family.
In two previous articles, I looked at the JTAG access port from a security perspective, and considered what exposure the choice of BMC operating system might have on a platform supporting At-Scale Debug. Now, let’s consider the root of all trust, the silicon itself, and see what options exist for locking it down.
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