The news is out! Intel today announced its Intel Xeon Processor Scalable Family, codenamed Purley or Skylake-EP.
ASSET of course has supported this silicon since its earliest beginnings, with the SourcePoint and ScanWorks Embedded Diagnostics products.
Read the full press release here: ASSET releases new benchtop and remote debugging applications for Intel Xeon Processor Scalable Family.
In two previous articles, I looked at the JTAG access port from a security perspective, and considered what exposure the choice of BMC operating system might have on a platform supporting At-Scale Debug. Now, let’s consider the root of all trust, the silicon itself, and see what options exist for locking it down.
ASSET was recently awarded a multi-year contract for embedding boundary-scan test technology within a military system design. This meets a requirement of greater than 92% structural test diagnostic accuracy in-system, and will save millions of dollars over the lifespan of the system.
In my last article, I used Last Branch Record (LBR) Trace to manually capture UEFI program flow source and destination addresses. This week, I look at the associated instruction opcodes and mnemonics and try to figure out what is going on.