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Category: Embedded Diagnostics

Debug of Intel CATERR

Alan Sguigna
Alan Sguigna
  • 4:36 pm
In my last article, I outlined a short embedded JTAG-based ‘C’ routine to dump machine check errors in the event of a system crash or hang. In today’s blog, I look at this in the larger context of diagnosing the root cause of system wedges, and what embedded ITP techniques can be used to gather as much forensics data as possible.

A Short Routine to Dump Machine Check Errors Using Embedded ITP

Alan Sguigna
Alan Sguigna
  • 1:39 pm
ASSET implements in-situ diagnostics via direct support of the x86 JTAG-based run-control API down on the target. The run-control API are synonymous with lower-level Intel In-Target Probe (ITP) procedures. What follows is a sample ‘C’ routine written to dump the contents of the machine check registers, in the event of a system wedge (for example, a three-strike event).

Timing Benchmarks for BMC-Assisted Embedded JTAG

Alan Sguigna
Alan Sguigna
  • 5:33 pm
Moving run-control (Intel In-Target Probe, or ITP) down into the service processor on an x86 design results in a screamingly fast, scalable implementation of at-scale debug. This article contains some timing benchmarks of our embedded solution versus alternatives. The results are nothing short of astonishing.

Embedded JTAG for Built-In Self Test

Alan Sguigna
Alan Sguigna
  • 9:01 pm
Embedding JTAG into a system’s service processor allows for powerful out-of-band (independent of the operating system) built-in self test (BIST) functions. Using JTAG-based boundary scan, for example, can isolate system failure root cause to an extent unachievable through any other means.

Embedded Run-Control for Power-On Self Test

Alan Sguigna
Alan Sguigna
  • 5:07 pm
High-end, mission-critical systems often use a plethora of diagnostic routines for power-on self test (POST), data logging, operational measurements, Built-In Self Test (BIST), and platform audits. Embedded x86 JTAG run-control adds out-of-band services to this mix. This article describes one such use case for Power-On Self Test (POST) of PCI Express ports.

Spectre, Meltdown, and embedded MSR access

Alan Sguigna
Alan Sguigna
  • 6:52 am
In the article JTAG and run-control API in BMCs for at-scale debug, I described how embedding the Intel ITP run-control library down on a service processor provides for a rich set of target-based functions for debug forensics. How might this apply to reading MSRs, such as the ones created to address Spectre and Meltdown.
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