Category: Embedded Diagnostics

I spent the past two days at the Open Compute Project (OCP) U.S. Summit 2017, in Santa Clara, California. The HUGE news is that Microsoft has ported Windows Server to ARMv8 chips from Qualcomm and Cavium (but, for now, only for use within Azure).
The use of embedded run-control is fast becoming a standard for remote debug on Intel server designs. It’s important to understand the key functionality and performance criteria in evaluating a solution for this application.
Run-control technology is rapidly becoming a de facto standard for forensics retrieval within high-availability, Intel Xeon-class servers. How did this standard come to be established?
The conventional approach to hardware-assisted debugging on Intel platforms involves physically connecting an external probe to the target. Is there a better way?
It is often part of a hardware validation test suite to initiate multiple PCIe bus retrains, looking for hardware design issues, or LTSSM RTL bugs in the device under test. These test suites take a very long time to run. Is there a way to speed them up?