Category: Industry Standards and Forums

Those of you with a telecom background are no doubt aware of the “OSI Network Model”, also known as the OSI pyramid or stack. It is a way of sub-dividing a communications system into smaller parts called layers. A layer is a collection of similar functions that provide services to the layer above it and receives services from the layer below it. A decade ago, the telecommunications test industry underwent a revolution when platforms emerged that could cover multiple layers of the OSI stack. Now, the same thing is happening in the circuit board test industry...
It is a well-known fact that manufacturing test strategies must involve a combination of inspection, structural, and functional test technologies in order to yield highest quality and minimize customer returns. But a new breed of non-intrusive, software-based technologies promises to disrupt legacy test solutions by guaranteeing the highest test coverage at the lowest cost. These technologies leverage off of the embedded instruments within silicon to achieve this goal in the following ways...
ASSET has been awarded the prestigious 2010 Innovation of the Year Award in the PCB automated test equipment category by Frost & Sullivan. This distinguished award is a tremendous third-party validation of ASSET’s embedded instrumentation strategy, and is based upon our drive to reduce test costs in the face of increasingly complex test challenges...
Last week, ASSET unveiled the first toolkit for IEEE 1687 at the International Test Conference (ITC) in Austin, TX. ITC is the cornerstone of “Test Week”, a premiere technical event which addresses the challenges of providing high-quality, cost-effective test solutions for chips, boards and systems...
Because ASSET is a pioneer in the use of non-intrusive solutions for validation, test and debug (using what we call “embedded instrumentation”), we often get asked if legacy testers like In-Circuit Test (ICT) machines can be used for the testing of high-speed I/O...
The IEEE 1687 standard resonates with engineers and managers, no matter which part of the semiconductor-based product lifecycle they are involved with, because it either solves a technical problem, it provides a cost advantage, it reduces the amount of work, or it enables automation of some (onerous) task…
This is the first of a series of blogs answering the question, “what is IEEE 1687”. Subsequent blogs will cover the topics “who uses IEEE 1687”, “what are the advantages of using IEEE 1687 (why use IEEE 1687)”, and “how to use IEEE 1687.”
Last week iNEMI (the International Electronics Manufacturing Initiative) concluded its nine-month project investigating Built-In Self-Test (BIST). The purpose of the iNEMI Project was to develop and promote the adoption of chip BIST at the board and system level. Here's a summary of the conclusions...
How do test engineers quantify the amount of test coverage they get on a particular board design? Is this science or black magic? I believe it’s both. One scientific innovation I’ve seen recently is the adoption of PCOLA/SOQ/FAM by iNEMI. Yeah, I know that’s a lot of letters strung together, but here’s what it means...
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