Boundary Scan Archives | Page 14 of 14

What is JTAG? and What is IJTAG?

Alan Sguigna

July 4, 2011
11:50 am

I’m sometimes asked how JTAG, IJTAG and boundary scan all relate to one another. Here’s a short explanation.

The Limitations of ICT

Alan Sguigna

April 9, 2011
2:58 pm

Tired of that old bed-of-nails? Legacy In-Circuit Test (ICT) has been diminishing in value for a long time. Let’s explore some of the current technical issues with ICT as test access on new circuit board designs continues to disappear.

The test stack

Alan Sguigna

February 20, 2011
9:20 am

Those of you with a telecom background are no doubt aware of the “OSI Network Model”, also known as the OSI pyramid or stack. It is a way of sub-dividing a communications system into smaller parts called layers. A layer is a collection of similar functions that provide services to the layer above it and receives services from the layer below it. A decade ago, the telecommunications test industry underwent a revolution when platforms emerged that could cover multiple layers of the OSI stack. Now, the same thing is happening in the circuit board test industry...

Testing 2nd generation Intel® Core™ microarchitecture (aka Sandy Bridge)

Alan Sguigna

January 17, 2011
4:16 pm

Some of you may have noticed Intel’s announcement this past week at CES of the new generation of desktop/mobile processors, the 2nd Generation Intel Core family. These processors are based upon a new microarchitecture at a 32nm process node. This increased level of density and functionality requires new board testing strategies...

Test coverage using multiple technologies

Alan Sguigna

January 10, 2011
9:17 pm

It is a well-known fact that manufacturing test strategies must involve a combination of inspection, structural, and functional test technologies in order to yield highest quality and minimize customer returns. But a new breed of non-intrusive, software-based technologies promises to disrupt legacy test solutions by guaranteeing the highest test coverage at the lowest cost. These technologies leverage off of the embedded instruments within silicon to achieve this goal in the following ways...

High Speed I/O Testing on In-Circuit Test

Alan Sguigna

November 4, 2010
6:19 pm

Because ASSET is a pioneer in the use of non-intrusive solutions for validation, test and debug (using what we call “embedded instrumentation”), we often get asked if legacy testers like In-Circuit Test (ICT) machines can be used for the testing of high-speed I/O...

Intel® Xeon® Processor 7500 Series (codenamed Nehalem-EX)

Alan Sguigna

August 3, 2010
10:11 am

The new Intel® Xeon® Processor 7500 Series (codenamed Nehalem-EX) is truly a leap forward for Intel server technology and forms the foundation for high-end clusters and supercomputers for years to come. Read our free whitepaper that explains how to validate and test these advanced platforms...

Category: Boundary Scan

What is JTAG? and What is IJTAG?

More Problems with In-Circuit Test

The Limitations of ICT

The test stack

Testing 2nd generation Intel® Core™ microarchitecture (aka Sandy Bridge)

Test coverage using multiple technologies

High Speed I/O Testing on In-Circuit Test

Intel® Xeon® Processor 7500 Series (codenamed Nehalem-EX)

Archives

Categories