Category: Boundary Scan

Testing high-speed memories soldered to a circuit board is as elusive as it is critical for overall system performance. Testing DDR3 and DDR4 memory buses can be particularly tricky, given the fact that DDR is so fast and that the bus carries the clock and data on both the rising and falling edges of the signal. Sorting all of that out and making sure it stays sorted out over the life cycle of a system can be a daunting challenge.
Today’s flying probe testers can give high structural test coverage, making them ideal for prototype board bring-up and low-volume manufacturing. But they can be darned slow. Can boundary scan help?
Isn’t it a great time to be a board designer? Compared to twelve years ago, the average number of nets has gone from 1,544 to 2,832; the number of pin-to-pin connections has increased from 7,661 to 13,573; the number of components has grown from 1,120 to 3,518; and many other challenges to the job have arisen.
Board bring-up is a phased process whereby an electronics system is repeatedly tested, validated and debugged, in order to achieve readiness for manufacture. This process can take so long that a product never gets to market because it is succeeded by the next generation...
Programming NOR or large NAND flash devices can be done using a variety of technologies, including boundary scan (JTAG), processor-controlled test (emulation), or FPGA-controlled test. Which embedded instrument you use is a trade-off between speed, complexity and cost.