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Category: Software Debug and Trace – Intel

DCI Debug on the AAEON UP Xtreme i11 board

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Alan Sguigna
Finally! A publicly available board with Intel Direct Connect Interface (DCI) working out of the box. With our SourcePoint JTAG-based debugger, it is now possible to explore the inner workings of low-level firmware with all the power of CPU-hardware-assisted run-control and trace features, including Intel Processor Trace and Architectural Event Trace.

Webinar: Beyond printf

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Alan Sguigna
In collaboration with the UEFI Forum, I’ll be presenting Beyond Printf: Real-Time UEFI Debugging on Wednesday, October 27th, 2021 at 10am CT. Register here: https://www.brighttalk.com/webcast/18206/512103 to watch the session live, and/or later view the recorded video. What powerful new debugging and trace features exist on the latest Intel silicon? Continue reading, or watch the webinar.

Using the Intel Trace Hub for at-speed printf

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Alan Sguigna
For debugging firmware, print statements (“printf”) are often our most powerful tool: some bugs are caused by complex sequences of events that are too long and intricate to root-cause using just breakpoints and watch windows. In this article, I write about my explorations into “at-speed printf”.

Coding to the SED API: Part 5

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Alan Sguigna
In this installment of the Coding to the SED API series, we’ll look at the SED functions that access the OOBMSM, and use it for super-fast retrieval of hardware telemetry data.

A Trio of Webinars on x86 JTAG-based Debugging

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Alan Sguigna
For each of the months of January, February and March, I did a webinar on JTAG-based debugging. Since each of the video recordings are about 45 minutes long, I thought it would be helpful to point out the highlights of each, if you don’t have time to sit through the full durations. At the risk of sounding immodest, there are some real gems of information within the demos of each webinar.

Webinar: Embedded @Scale JTAG-based Debug of x86 Servers

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Alan Sguigna
Beginning with Microsoft Azure's Project Olympus, and now a standard within the Open Compute Project, many datacenter servers are now optionally equipped with hardware connectivity between the platform BMC and CPU scan chain. The BMC can thus act as an autonomous JTAG-based embedded out-of-band debug agent, provide low-level triage of system events, such as crashes and hangs. Other use cases, such as hardware validation, manufacturing test, and forensics telemetry are also enabled by this technology.
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