Category: Software Debug and Trace – Intel

In my previousย blog, I did a walkthrough of the source code for main() within the ltloop JTAG-based on-target diagnostic. This article covers main() in more detail, and provides insight into some of the operations of the utility functions and data structures.
In my UEFI Forum webinar, I demonstrated a utility function for stressing PCI Express ports at-scale using JTAG. Letโ€™s walk through the source code and see how it works under the hood.
In my webinar with the UEFI Forum, I demonstrated some of the utility of using JTAG functionality within BMCs to perform out-of-band debug. This is a tutorial on the coding practices to use the SED API.
This past week, I did a webinar in collaboration with the UEFI Forum on JTAG-based UEFI Debug and Trace. This reviewed some of the often-used tools for low-level triage of difficult-to-diagnose, intermittent bugs. Near the end, I demonstrated the usage of technology running directly down on a BMC to perform low-level functions not achievable with firmware or OS-based applications.
Iโ€™ve been working from home for quite some time now, and donโ€™t have access to all the equipment I normally would have at the office. And Iโ€™ve wanted to flash the MinnowBoard (and some other boards). So, rather than wait for the coronavirus shelter-in-place to lift, I went out and bought a DediProg SF100 of my own. Hereโ€™s my out-of-the-box experience.
As everyone who works with server designs knows, Intel publishes a group of JTAG-based scripts called the Intel Customer Scripts (ICS, or CScripts for short). The CScripts are derived from internal applications that Intel uses for silicon validation, and they are enormously useful for board bring-up and debug. This week, I took a look at them, and ran some with SourcePoint.
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