Category: Software Debug and Trace – Intel

The Three Types of JTAG Access on Intel-based Designs

Alan Sguigna

July 24, 2016
5:02 pm

Pop quiz: there are three main mechanisms to access debug embedded instrumentation within Intel silicon. What are they?

ASSET joins the Open Compute Project

Alan Sguigna

July 17, 2016
2:49 pm

The mission of the Open Compute Project (OCP) is to design and enable the delivery of the most efficient server, storage and data center hardware designs for scalable computing. ASSET has just joined the OCP to contribute to the reliability and availability of OCP designs.

A Different Approach to Debug Access

Alan Sguigna

July 10, 2016
3:45 pm

Historically, hardware-assisted debugger access to Intel platforms was via a proprietary XDP 60-pin connector. This has now changed, with JTAG access available over USB3 ports.

Speeding up printf for BIOS Trace

Alan Sguigna

July 4, 2016
5:22 pm

UEFI, like other embedded code bases, is riddled with printf style debug statements. In debug builds, these can slow the boot process down tremendously. There is a way to circumvent this.

Intel Processor Trace for UEFI Debug

Alan Sguigna

June 26, 2016
9:57 pm

Intel Processor Trace (Intel PT) is a capability on new Intel silicon that captures information about software execution using dedicated hardware facilities inside the chip. How is it used to debug UEFI?

Heterogeneous System Architecture within High-Performance Computing

Alan Sguigna

June 19, 2016
3:48 pm

Heterogeneous Computing refers to systems that use more than one kind of processor, typically a combination of CPUs and GPUs, sometimes on the same silicon die. Is this solution optimized for supercomputing applications?

Benefits of, and Misconceptions about, UEFI

Alan Sguigna

May 8, 2016
4:42 pm

ASSET recently joined the UEFI Forum and, enjoying the benefits of membership, we came across this paper extolling the virtues of the technology and clarifying some common misconceptions.

New software debug controller gives quick USB3 access for Intel platforms

Larry Osborn

April 19, 2016
11:02 am

More efficient BIOS printf trace

Alan Sguigna

April 17, 2016
3:51 pm

Conventional printf statements within a BIOS being debugged add a lot of “backpressure” due to the overhead within the printf routine and the cost of directing the output through a slow serial port. This slows the debugging process down, and may even mask some time-sensitive bugs. Is there a better, more non-intrusive way?

Remote CScripts application using the Emulex Pilot4 BMC

Alan Sguigna

April 10, 2016
4:08 pm

In a previous blog, I described how the ScanWorks Embedded Diagnostics (SED) utility runs Intel CScripts nearly as fast as legacy methods. This applies in particular using the Emulex Pilot4 BMC, with its on-chip JTAG Master.

Category: Software Debug and Trace – Intel

The Three Types of JTAG Access on Intel-based Designs

ASSET joins the Open Compute Project

A Different Approach to Debug Access

Speeding up printf for BIOS Trace

Intel Processor Trace for UEFI Debug

Heterogeneous System Architecture within High-Performance Computing

Benefits of, and Misconceptions about, UEFI

New software debug controller gives quick USB3 access for Intel platforms

More efficient BIOS printf trace

Remote CScripts application using the Emulex Pilot4 BMC

Archives

Categories