Category: High-Speed I/O

Ircona, a company specializing in high-speed processor-based designs and BIOS customization for partners including Phoenix Technologies, has recently used our Intelยฎ Interconnect Built-In Self Test (IBIST) tool to troubleshoot some very elusive signal integrity issues on a high-end server design...
For those working with the new Intelยฎ QuickPath Interconnect (QPI) high speed bus, there's a new book on the market called โ€œMastering High Performance Multiprocessor Signalingโ€ by Dave Coleman and Michael Mirmak. This will become the "Bible" on high speed buses. Here are the details...
The new Intelยฎ Xeonยฎ Processor 7500 Series (codenamed Nehalem-EX) is truly a leap forward for Intel server technology and forms the foundation for high-end clusters and supercomputers for years to come. Read our free whitepaper that explains how to validate and test these advanced platforms...
Why do recent board designs need to be validated? Over the past few years we have seen a significant increase in signal speeds. In one generation of IA based boards, there was a 16x speed increase! This requires a new approach from designers and signal integrity engineers...
Many of us are responsible for validating and testing Intelยฎ-based designs. The latest Intelยฎ Xeonยฎ and Itaniumยฎ processor platforms use Intelโ€™s QuickPath Interconnect (QPI) to tie the processor and the I/O hubs together into single, dual, and multi-processor systems. This book from Intel explains their technology...
Recently I read a posting from a well-known In-circuit Test (ICT) vendor defending the use of test pads on high-speed signals. I found this message to be rather amusing, since the prevailing wisdom is to avoid these to prevent signal integrity issues. The posting went something like this...
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