Category: Non-intrusive Board Test (NBT)

PCI Express (PCIe) buses, in particularly Gen3, are susceptible to defects which may be masked from conventional test. What are these defects and how are they detected?
Ever have a PC die after a couple weeks or just after the warranty expires? Or perhaps the PC never powered up! Or maybe you have features like USB, a display or camera on the PC that don’t work. So you attempt to return it to the store where you purchased it only to find that it has to go back to the manufacturer. Ever wonder where those motherboards or laptop returns go? Or do you wonder how or why the faulty product ever shipped in the first place? I’ll first address the question of repair and then quality.
Testing high-speed memories soldered to a circuit board is as elusive as it is critical for overall system performance. Testing DDR3 and DDR4 memory buses can be particularly tricky, given the fact that DDR is so fast and that the bus carries the clock and data on both the rising and falling edges of the signal. Sorting all of that out and making sure it stays sorted out over the life cycle of a system can be a daunting challenge.
Readers of my previous Blog will have seen that investing in new test technology might be a smart thing to do, to save your company money. And if you save your company money, you’ll be a hero. Let’s dive into this a little deeper.
Companies sometimes are reluctant to invest in Test because they consider it a cost center. And, of course, there’s that tried-but-true adage, “if it ain’t broke, don’t fix it”. But investing in the right tester can dramatically lower overall costs. How do we prove this in financially?
Today’s flying probe testers can give high structural test coverage, making them ideal for prototype board bring-up and low-volume manufacturing. But they can be darned slow. Can boundary scan help?
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