Category: Arium Probes | SourcePoint™

The Minnowboard Chronicles Episode 6: LBR Trace

Alan Sguigna

February 12, 2017
12:14 pm

This week, I delve into using LBR (Last Branch Record) Trace on the Minnowboard, and continue my exploration into the UEFI source code.

The Minnowboard Chronicles Episode 5: PEIM and DXE

Alan Sguigna

February 5, 2017
3:47 pm

This week, I explore DXE, and do a deeper dive into the PEI.

The Minnowboard Chronicles Episode 4: UEFI Source Code

Alan Sguigna

January 29, 2017
7:31 pm

Success! This week, I managed to compile a debug version of the UEFI, load it into the Minnowboard, and see UEFI source code in SourcePoint for the first time.

The Minnowboard Chronicles Episode 3: Building the UEFI Image

Alan Sguigna

January 23, 2017
6:14 am

As I continue the journey to learn about the internals of UEFI and to debug it with SourcePoint, I encounter some issues doing the firmware build.

The Minnowboard Chronicles Episode 2: Updating the UEFI Firmware

Alan Sguigna

January 15, 2017
3:44 pm

Last week, I wrote about my out-of-the-box experience with the Minnowboard Turbot, and how easy it was to start JTAG-based debugging on it with the SourcePoint tool. This week, I explored the UEFI shell, and updated the board firmware.

The MinnowBoard Chronicles Episode 1: Debugging with SourcePoint

Alan Sguigna

January 8, 2017
3:55 pm

It may not be everyone’s idea of a good time, but I was delighted to receive a MinnowBoard Turbot for Christmas. I hooked it up to my copy of SourcePoint, and the results were pretty cool.

BMC-Assisted Debug

Alan Sguigna

January 2, 2017
5:20 pm

Run-control technology is rapidly becoming a de facto standard for forensics retrieval within high-availability, Intel Xeon-class servers. How did this standard come to be established?

At-Scale Debugging

Alan Sguigna

December 18, 2016
2:24 pm

The conventional approach to hardware-assisted debugging on Intel platforms involves physically connecting an external probe to the target. Is there a better way?

Using Embedded Run-Control for PCIe Link Testing – Part 2

Alan Sguigna

December 4, 2016
11:19 pm

In my last blog, I referred to the use of run-control technology to very quickly exercise the PCI Express link training state machine. What other kinds of tests can be run with this approach?

Using Embedded Run-Control for PCIe Link Training Testing

Alan Sguigna

November 6, 2016
5:43 pm

It is often part of a hardware validation test suite to initiate multiple PCIe bus retrains, looking for hardware design issues, or LTSSM RTL bugs in the device under test. These test suites take a very long time to run. Is there a way to speed them up?

Category: Arium Probes | SourcePoint™

The Minnowboard Chronicles Episode 6: LBR Trace

The Minnowboard Chronicles Episode 5: PEIM and DXE

The Minnowboard Chronicles Episode 4: UEFI Source Code

The Minnowboard Chronicles Episode 3: Building the UEFI Image

The Minnowboard Chronicles Episode 2: Updating the UEFI Firmware

The MinnowBoard Chronicles Episode 1: Debugging with SourcePoint

BMC-Assisted Debug

At-Scale Debugging

Using Embedded Run-Control for PCIe Link Testing – Part 2

Using Embedded Run-Control for PCIe Link Training Testing

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