Category: Arium Probes | SourcePoint™

The conventional approach to hardware-assisted debugging on Intel platforms involves physically connecting an external probe to the target. Is there a better way?
It is often part of a hardware validation test suite to initiate multiple PCIe bus retrains, looking for hardware design issues, or LTSSM RTL bugs in the device under test. These test suites take a very long time to run. Is there a way to speed them up?
ASSET joined the Open Compute Project (OCP) earlier this year, and we attended our first Engineering Workshop in Dallas last week. The theme of this session was the OCP Telco Project. What did we learn?