eResources

eResources

Arranged by category – Software Debug, Chip Debug, Hardware Validation, Manufacturing Test and Videos – these are some of our trending eBooks and videos. But there’s more, much more. Our experts are constantly working on new resources to help you. Click on the “More” buttons in each category to take a deeper dive.

Manufacturing Test

This eBook will chronicle our own experiences with dealing with these problems and use a Commercial Off the Shelf (COTS) board to delve deeply into the testing. We will emphasize the testing of DDR memory both structurally and functionally.  A Design For Test (DFT) analysis of the target board starting with the System on Module (SOM) and continuing with the Carrier Card (CC) will be described.

Software Debug

Chip Debug

Chiplet-based multi-die devices, as products of a heterogenous integration design methodology, play an important role in today’s chip design and implementation strategies. The drive to implement multi-die devices began in the 1970’s with a packaging innovation approach consisting of placing multiple interconnected chips on a package-scale substrate. These devices became known as multi-chip modules (MCMs). Over time, additional packaging innovations emerged such as System in a Package (SiP), System on Integrated Chip (SoIC)™, 2.5D-Integrated Circuits (ICs) and 3D-IC packages. Multi-die packaging innovations has allowed the semiconductor industry to create smaller, faster, configurable, and lower power ICs.

Hardware Validation

One-shot pass/fail validation testing won’t quantify the risk of faults on serdes and high-speed I/O (HSIO) buses, but data mining with statistical analytic tools will. In fact, you’ll see how close the bus is relative to its eye mask and where those failures are just waiting to happen. Why risk the crashes, poor performance and dissatisfied users?