Real Insight from Code to Silicon

Platform for Software Debug and Trace

Platform for Embedded Instruments

Software Debug

All the tools you need to debug and trace ARM and Intel embedded applications in one place.

Hardware Validation

Quickly validate both hardware/firmware interactions and operating margins in our design.

Chip Debug

All the tools you need to debug and trace ARM and Intel embedded applications in one place.

Manufacturing Test

Non-intrusive test technologies to maximize test coverage and diagnostics.

Testing DDR4 memory with Boundary Scan/JTAG

The ability to thoroughly test, characterize and diagnose faults and failures with soldered-down memory is one of the most pressing problems in the industry. With ASSET InterTech’s ScanWorks® Boundary-Scan Test, engineers designing with Double Data Rate 4 (DDR4) memory devices can facilitate shorts and opens testing on control, address, and data lines.

UEFI Framework Debugging | SourcePoint - Updated Version, November 2018!!

Accelerate your Xilinx Zynq UltraScale+ designs with PFx

Cut DDR tuning and test development efforts in half on i.MX 6-based designs

Coding to the SED API: Part 4

October 18, 2020

In Part 3 of this series, we did a code review of “ltloop”, a utility firmware application that uses the BMC to do out-of-band stress tests of PCI Express ports. In this article, we begin to examine a more general-purpose application that uses JTAG to extract register, memory and IO contents of the target. This On-Target Diagnostic (OTD), called “libtest”, is used by ASSET to test the functionality of run-control on new targets.

Coding to the SED API: Part 3

September 20, 2020

In the last article on this topic, we did a dive into the main routine of the lt_loop JTAG-based On-Target Diagnostic, seeing the overall flow of the program. In this article, we’ll look at the routine that does the heavy lifting for retraining the PCI Express link and checking for errors.

Coding to the SED API: Part 2

September 7, 2020

In my previous blog, I did a walkthrough of the source code for main() within the ltloop JTAG-based on-target diagnostic. This article covers main() in more detail, and provides insight into some of the operations of the utility functions and data structures.

Coding to the SED API: Part 1

August 30, 2020

In my UEFI Forum webinar, I demonstrated a utility function for stressing PCI Express ports at-scale using JTAG. Let’s walk through the source code and see how it works under the hood.

Learn More Live

Here’s your chance to see how easy it is to debug and test using SourcePoint or ScanWorks. Let us walk you through it!