A recent survey asked test engineers to identify their biggest circuit board test problems. Among the top three answers were characterizing and testing soldered-down memories!

In recent years, the sheer number of advanced digital networks on circuit boards has grown exponentially. These chip-to-chip interconnects, which are largely comprised of AC-coupled and/or differential networks, are much more difficult to test than the DC-coupled and single-ended nets they have replaced.

Cost goes up. Complexity goes up. Speed goes up. But time to debug boards goes down. Something’s gotta give, or at least change. The answer is taking advantage of the processor's JTAG debug port to enable an inside out approach to debug and test at-speed, not outside in at ‘low-speed’.

For the last 30 years or more, the electronics industry has mostly relied on a hands-on approach to test and measurement. Older board test technologies and external instrumentation include in-circuit test (ICT), manufacturing defect analysis (MDA), flying probe, oscilloscopes, logic analyzers and others.

Many electronic systems feature a wide range of system monitoring devices. The task is keeping track of certain conditions or operating parameters, like temperature while the system performs its function.Validating the functionality of I2C or SPI system monitors during prototype board bring-up is usually difficult and time consuming. The stakes are high because any delay can jeopardize the product introduction.

Learn what IEEE 1149.7 is all about, what its objectives are, how it works, its implications for debugging SoCs and 3D chips, and for testing circuit boards. Several illustrations show IEEE 1149.7 topologies. Scan-state sequences and flow charts clarify IEEE 1149.7’s terminology.

Serial Vector Format (SVF) is a file format consisting of boundary scan vectors to be sent to a device under test so that such information can be exchanged among various tools. Originally developed by Teradyne and Texas Instruments, it was handed over to TI spinoff ASSET InterTech, who manages and maintains the specification. Having been adopted for its expressed purpose by a large number of companies, it is the de facto standard.

What’s a designer to do when faced with a catch-22? How to diagnose and debug prototype circuit boards that will not boot the bare metal firmware or have no BIOS at all? But without some software, diagnosing structural and functional defects is practically impossible.

In-circuit test (ICT) seemed ideal for simplifying test generation and execution when it was first introduced. But device package changes, device complexity, board layout density and increased circuit speeds have eroded usability and test coverage of ICT ever since. Many advances have been made to keep ICT relevant, but those advances haven’t kept pace with the erosion of test access.