Serial Vector Format (SVF) is a file format consisting of boundary scan vectors to be sent to a device under test so that such information can be exchanged among various tools. Originally developed by Teradyne and Texas Instruments, it was handed over to TI spinoff ASSET InterTech, who manages and maintains the specification. Having been adopted for its expressed purpose by a large number of companies, it is the de facto standard.
What’s a designer to do when faced with a catch-22? How to diagnose and debug prototype circuit boards that will not boot the bare metal firmware or have no BIOS at all? But without some software, diagnosing structural and functional defects is practically impossible.
In-circuit test (ICT) seemed ideal for simplifying test generation and execution when it was first introduced. But device package changes, device complexity, board layout density and increased circuit speeds have eroded usability and test coverage of ICT ever since. Many advances have been made to keep ICT relevant, but those advances haven’t kept pace with the erosion of test access.
One of the most pressing problems for system manufacturers is testing memory and memory buses on circuit boards. The speeds are simply too high, and signals get easily distorted when touched by probes.
JTAG was originally developed to solve board interconnect test problems and has evolved into a widespread and generic soft access test mechanism for chips, boards and systems. Examples includes reading internal registers and chip ID-codes, program flash memories, run BIST and embedded instruments thru IJTAG.
Bringing up prototype circuit boards is a tipping point in the product development cycle. Unfortunately, it too often becomes a tripping point. Boards that won’t come up can derail the project entirely, delaying the launch of the product into the market and generating staggering opportunity costs. Board bring-up must verify the functionality of the hardware so that application software can be loaded and debugged. Without a known-good-board, diagnosing software bugs would be futile.
An FCT whitepaper by Al Crouch, Chief Technologist at ASSET InterTech and Co-Chairman of the IEEE P1687 IJTAG Standard Working Group.
This paper begins with an executive summary of embedded diagnostics, followed by an introduction to the 9's concept for highly-available systems, and then documents a number of case studies. It subsequently looks into the cost of server downtime and concludes with a section on future developments for high-availability systems.
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