Newly updated with content on Architectural Event Trace (AET) and At-Speed Printf (ASPf), this is the ultimate guide for UEFI, firmware, and platform validation engineers. Full of helpful tips and techniques for both novice and experienced debug engineers, it’s a book you’ll pull off the shelf time and again when those nasty bugs raise their heads.
Intel®’s Trace Hub has arrived in the nick of time for faster software debug. Code bases, including UEFI firmware, have gotten so large and so complex that just navigating through instruction trace data to find the root cause of a bug is close to impossible.
Software debug has changed dramatically and for the better, especially with Intel’s introduction of new trace IP in its silicon and ARM’s enhanced trace macrocells.
What happens when you’re mixing multiple embedded TAPs – eTAPs? Like when TAPs for IEEE 1149.1 boundary scan, JTAG software debug ports (ARM DAP, Intel ITP) and IJTAG instruments are all in the same SoC design? You might be in for an ugly surprise. The eTAPs accessed through the chip-level TAP might not do what you had in mind.
Analyzing and debugging a new computer design based on Intel® processor can be a daunting task. To help, Intel provides Python-based scripts, called Intel Customer Scripts (ICS), to deal with memory errors, crash dumps and other catastrophic errors (CATERR) that engineers encounter when bringing up new hardware or debugging firmware. The scripts validate how the system executes and can be used in several operating environments.
The new instruction trace features included in Intel® processors and SoCs offer software developers important debug capabilities that can significantly reduce development time. Unlike previous versions of trace, Intel’s new trace features combined with a powerful debugger can quickly uncover the root causes of bugs, diagnose performance issues, recover system or module execution histories and discover the causes of other troublesome bugs.
Big-Endian and Little-Endian refer to the way a word of data is stored in sequential bytes of memory. This SourcePoint application note describes how endianness works on ARM processors and what is important for software designers to consider.
Multicore architectures. Multi-threading software. Power management. The capabilities for SoCs has skyrocketed over the last few years. That’s just great! Until a system bug occurs of course. Oops! Then life’s not so great anymore.