When designing with the latest SRAM (DDR2, DDR3, DDR4, LPDDR) memories, there is a need to learn the memory controller inside the SoC and then use that information to figure out how to tune your memory system for optimal performance. That can be a time-consuming task for a designer. ScanWorks Processor-based Functional Test DDR (PFTDDR) dramatically simplifies that job by delivering proprietary IP specific to the SoC memory controller that enables the engineer to quickly find the tuning values to maximize design performance. Those values can then be easily reused for the DDR test program in production and/or in environmental chamber testing using ScanWorks. Calibration of prototype samples is integral to determine the optimal values necessary for production.
When Optimizing Memory System Performance matters … ScanWorks PFTDDR delivers!
Almost all boards today have test access issues due to the combination of functional density and board size. Boundary scan has been the leading board test technology to address lack of access and the more boundary scan devices you have, the better the test coverage. But boundary scan has its limits where devices don’t have boundary scan or you need a broader fault spectrum than just shorts and opens, especially with today’s high-speed SerDes IO technologies and various bus topologies. ScanWorks Processor-based Functional Test (PFT) and DRR Test (PFTDDR) are the answers to solve those tough problems.
When Maximizing Test Coverage matters … ScanWorks PFTDDR and PFT deliver!
ScanWorks Processor-based Functional Test for DDR provides the fastest means in assisting designers with optimal DDR configurations and shortening the DDR tuning development cycle. It accomplishes this by including the tuning portion of code the designer would need to develop themselves as part of the product. The tuning is specific to the SoC memory controller. The IP walks through all permissable values for write leveling and delay compensation and then exports a table with possible values that the designer can use for optimal DDR performance or environmental constrainted configurations. This code is ready to run within the On-Chip Memory (OCM) without modification.
ScanWorks Processor-based Functional Test for DDR provides the fastest means in assisting designers with optimal DDR configurations and shortening the test development cycle, thus keeping projects on schedule. Like the other members of the ScanWorks PFx family (Processor-based Fast Programming, Processor-based Functional Test) Processor-based Functional Test for DRR uses the core portion, CPU and OCM (On Chip Memory), of the SoC as the target for the controlling agent. This firmware will lessen the knowledge burden for DDR calibration, tuning, and functional test development. It provides everything needed for a fast and comprehensive solution for configuration and testing of all DDR memory. The memory tests include:
Walking 0’s and 1’s
Address Line Test
Data Bus Noise Test
Memory Cell Test
Address March Test
Burst Transfer Test
Simultaneous Switching Output Test
This firmware has no need of an operating system or boot loader, thus is perfect for early prototype board development. ScanWorks Processor-based Functional Test for DDR is designed to enable time savings in development and to increase product quality for Arm Cortex based SoC’s from Xilinx and NXP. Arm-based SoCs provide a powerful platform for product development in many market segments such as Defense, Automotive, Embedded Vision, IoT and IIoT. The common thread in all these markets is developing with DDR memories.
The benefit of the SoC reducing chip count comes with a cost in terms of additional knowledge requirements for both development and manufacturing test in configuration of the embedded DDR memory controller. ScanWorks PFx reduces the knowledge burden and increases quality. The combination of ScanWorks and the right ARM SoC will ensure your development project is a success.
The ScanWorks platform for embedded instruments is supported by a wide variety of hardware controllers and accessories with which engineers can connect ScanWorks to their unit under test (UUT). Hardware is available for development, production and repair environments. The test platform required for ScanWorks is either a standard PC or a system with a built-in (embedded) JTAG controller.