DDR Memory Test: Modern Tools for Validation, Test and Debug

Today’s market with device shortages is causing havoc with product redesigns. The unpredictability of component availability and pricing are just the start. The time to design a replacement product pushes the revenue stream farther out for the next generation which is critical to meet the expected window of opportunity. Then there is the impact on production test resources.

This eBook will chronicle our own experiences with dealing with these problems and use a Commercial Off the Shelf (COTS) board to delve deeply into the testing. We will emphasize the testing of DDR memory both structurally and functionally.  A Design For Test (DFT) analysis of the target board starting with the System on Module (SOM) and continuing with the Carrier Card (CC) will be described.

Key Points:

  • DDR4 Analysis for expanding structural test
  • Functional Test SoC deep dive
    • DDR Controller
    • Ethernet Controller
    • SDIO Controller
    • MIO Configuration
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