System Marginality Validation DDR Memory and Serial I/O

Designing sufficient operating margins into today’s high-speed printed circuit boards has become a very tough job. Especially challenging are those high-speed serial I/O and DDR3|DDR4 memory buses. Measuring signal integrity on a lane or two here and there won’t cut it anymore.

System marginality validation (SMV) picks up where signal integrity validation (SIV) with an oscilloscope drops off. Unlike SIV, which is too limited and too expensive, SMV determines the marginality of the entire system. All buses, all lanes. And, it takes into account variances in silicon and circuit board manufacturing processes, as well as changes in voltage, temperature, humidity and other conditions. So you’ll know how the design is going to operate in the real world. And you’ll reduce returns.

This eBook packs a ton of in-depth know-how on system marginality validation into more than 60 informative and fully illustrated pages.


  • System Marginality Validation 101
  • Oscilloscope vs Embedded Instruments
  • Memory Validation DDR3|DDR4
  • High-Speed Serial I/O Validation
  • Adaptive Equalization and Power Consumption
  • The Intel Cougar Point SATA Bug
Book cover image