Embedded JTAG for Boundary-Scan Test

JTAG/boundary-scan test can be embedded as firmware within a PCB’s service processor. This guide describes the related JTAG technology and its implementation. Become an expert in this innovative application of IEEE 1149.1!

Table of Contents:

Test Coverage and Fault Detection/Diagnosis
Boundary-Scan Test
Design for Test Requirements
Technical Description
Action Types
• Scan Path Verify
• IEEE 1149.1 Interconnect testing
• IEEE 1149.6 Interconnect testing
• Memory Access Verification
• CPLD/FPGA Programming/Configuration
• Flash Programming
Action Players
Service Processor/BMC Resource Requirements
Hardware Signal Interface
FPGA Resource Requirements

Book cover image