We work hard at ASSET to improve the features and usability of ScanWorks with each release. Our latest release, ScanWorks 4.11.0, brings feature improvements such as:
- IEEE 1149.1-2013 and 1149.6-2015 BSDL Support using Flattener
- Improved overall user experience and more intuitive user interface
- Improved Boundary Scan coverage and analysis reporting
Empowerment for the next generation ScanWorks users.
ScanWorks 4.11.0 also sets the platform for our ScanWorks 5.0.0 release, scheduled for 2024. ScanWorks 5.0.0 will bring many more improvements, external and internal, that will empower the next generation of ScanWorks users for board test, debug, validation, and debug for many years to come.
During internal testing of ScanWorks 4.11.0, it was brought to my attention by a Software Developer that with the release of ScanWorks 4.11.0., ASSET will have reached a significant milestone.
A few fun facts.
The release of ScanWorks 4.11.0, excluding maintenance releases, marks our 40th ScanWorks major software release since 1995. Quite an achievement!
Reaching such a significant milestone got me thinking about the history of ScanWorks, so I decided to go back in time and see how ScanWorks has evolved.
ScanWorks, as we know it today, wasn’t always named ScanWorks. Our Boundary Scan tool was originally named ASSET. Over time, and with each release of ASSET, more features were added, and the capabilities of the tool grew. Originally, ASSET users implemented features through a command line interface. A user interface was later added to increase usability.
I found a fantastic chart that illustrates the path and growth of ASSET up to the very 1st ScanWorks release. You can see how many of the features that are standard to ScanWorks came to be included in ScanWorks.
|1995||Texas Instruments sells ASSET® business unit to ASSET team. ASSET InterTech, Inc. formed on June 1 to run the new business.|
|1996||ASSET 2.1 released on Windows 95, install base grows to 500 seats in > 150 companies. Released ScanDirect™, ScanDriver™, and ClusterCheck™.|
|1997||ASSET 2.2 released on Windows 95 and Windows NT. Released SystemMerge and STEM (from partnership with Lucent Technologies). Released ScanPort™ and PCI and PCMCIA controller cards.|
|1998||ASSET 2.2b released. Includes MemoryConnect™ and memBIST™.|
|1999||ASSET 2.3 (on CD), 2.3a (over www) 2.3b (on CD, 2.3c (over www). 2.3d (over www), and 2.3e (over www) released. 2.3 includes QuickSPI™ system ISPExtender™, ScanProgrammer™ with added support for ISP, Jam™, and online help files. 2.3a includes ScanBuilder™, HSDL Generator, and multiple updates to ScanConnect. 2.3b includes FlashProgrammer™, 2.3c includes ScanAccess™, long BSDL filename support in ScanBuilder and ScanConnect, and a new FlashProgrammer Read Macor. 2.3d includes network licensing. 2.3e includes SystemMerge™ updates.
*** ASSET is Year 2000-compliant! ***
|2000||ASSET 3.0 (ScanWorks™) is released. New UI with ease-use features. ASSET 3.0.1 released with the ability to name directory structures.|
|2001||ASSET 3.0.2 was released with the ability to view layouts via the design browser and pinpoint failures graphically. ASSET released 3.1 with new bus composer and flash programming capabilities.|
I had to search for these CDs, but I found our original ScanWorks 3.0 and 3.0.1 release CDs in their original packaging. What a find!
Our users have seen consistent improvements and feature additions in ScanWorks over the years. For example, external changes in the look and feel of the UI changed. ScanWorks 3.X had a Windows UI, to ScanWorks 4.X, where the UI was transformed into a streamlined, fast-responding HTML-based interface.
With each release, we seek to improve the functionality and useability of the tool.
Since its inception, ScanWorks has provided board-level shorts and opens testing of interconnects between Boundary-Scan devices using its Automatic Test Pattern Generation (ATPG) feature. ScanWorks ATPG creates the patterns necessary for shorts and opens testing based on the board topology (i.e., connections between devices) and the Boundary-Scan Cell types on the I/O pins within each device.
With a recent enhancement, ScanWorks can now generate patterns that can be applied by chip-level automatic test equipment (ATE) to test for shorts and opens in the interconnections between silicon “chiplets” in multi-die devices. ScanWorks will now output patterns based on the Standard Test Interface Language (STIL) for testing chiplet-based ICs.
To reduce device programming time in production, users can take advantage of our FPGA-based Flash Programming technology. With FFP, users create custom IP which can be inserted into an FPGA to create an at-speed programming engine. Some of our users have experienced a 10x reduction in the programming time of on-board devices. Reducing programming time increases production throughput, saving time and money.
Functional testing can be implemented with ScanWorks via a Component Action. The ScanWorks Component Action provides users easier access to monitors and controllers of temperature, voltage, and current, as well as other system configuration devices, analog-to-digital converters (ADC), digital-to-analog converters (DAC), codecs, and others. Many of these sorts of devices are based on the popular I2C and SPI communication protocols. As a result, they are perfect for a model-based methodology that capitalizes on two aspects of reuse, saving users significant amounts of time, effort, and cost.
Dual Data Rate (DDR) memory devices have evolved and ScanWorks has kept pace. With ScanWorks Memory Access Verify action, testing DDR devices is possible. DDR devices that support the Connectivity Test (CT) can also be tested for structural integrity and functionality.
A platform for accessing silicon-embedded instrumentation.
ScanWorks has evolved into a platform for accessing silicon-embedded instrumentation as demonstrated by the number of products available.
Excellent and high-resolution coverage of structural faults. The ScanWorks platform’s boundary-scan/JTAG tools locate defects on individual pins and programs devices quickly.
Growth in flash programs slowing your production down? ScanWorks has the Fast Flash in-system programming answers to get your products flying down the line.
Embedding ScanWorks in-system pays off in a big way. Data leading up to a failure is stored so forensics can find root causes fast. And it works locally or remotely through the cloud.
Allows for IP to be inserted into an FPGA to dramatically speed up in-system device programming versus what can be accomplished with normal boundary-scan programming.
Saving time and optimizing performance are constant concerns. ScanWorks’ DDR tuning solution addresses both concerns with unique SoC specific downloadable IP.
Increase your board test coverage by executing at-speed bus tests of the I/O and memory buses and get structural coverage where other tests may leave gaps.
Increase your board test coverage by executing at-speed bus tests of the I/O and memory buses with ScanWorks Processor-based Functional Test products. Additionally, get structural coverage where other tests may leave gaps.
The ScanWorks FPGA-Controlled Test (FCT) product allows for IP to be inserted into an FPGA that is already part of the design to perform validation of buses, functional testing and other tests complementing your boundary scan tests for improved test coverage.
Along with the evolution of the tool, the hardware used to connect ScanWorks to the UUT has evolved. Today, ScanWorks supports hardware controllers such as USB, PCI, PCIe, PXI, and Ethernet controllers. ScanWorks also supports Teradyne’s™ Di-Series and High-Speed Subsystem.
We are constantly listening to and learning from our customers and with each release we make changes to improve the tool. ASSET and ScanWorks will continue to lead the test and measurement industry in supporting current and future IEEE standards.
More exciting features and enhancements are to come!