By Electronics Technology Forum*: With growing circuit density, comes greater complexity and higher performance, all of which bring complications for accessibility to facilitate test and diagnosis. As a consequence, a new breed of instrumentation, wherein test and measurement capabilities are embedded within the silicon chips, has arisen to meet the challenge. While early methods, such as scan test, were focused exclusively on the problems of silicon makers, the need to use similar methods at board test gave rise to boundary scan and JTAG. These, in turn, have been adapted to access the silicon instruments on boards and in the system context. The resulting independence from intrusive test methods, such as those reliant on ICT probes and test points, presents new opportunities for test reusability across all levels of integration and across the entire product life cycle.
*© 2014 QCG Technology Forum.