Little more than a year-and-a-half ago, ASSET and Arium merged. Our two companies came together because we could both see the same thing. Actually, a couple of things.
First, the visibility that both software and hardware engineers had available to them was not enough. Technology has been progressing so rapidly and changing so dramatically that much of it is beyond the reach of legacy tools. And second, a new kind of visibility – we call it ‘real insight’ – based on new methods is the most effective way to meet the needs of engineers. The industry has seen that extending legacy tools to keep up with rapidly changing technologies is not cost-effective. New methods are needed.
From the moment our two companies came together, we knew that we were combining two strengths. What we have achieved over the last year-and-a-half is what every merger hopes to achieve. Instead of one plus one equaling two, the combination of our two companies has added up to at least three and maybe more. After all, we were taking one company that was very strong in hardware validation, test and debug, and combining it with another company that was very strong in software debug and trace. As a result of the merger, we’re now providing greater insight – real insight because it’s based on empirical observations and measurements – across the entire software/hardware spectrum.
Immediately following the merger, one of the first things we did was to take stock of our commitments to users and make sure we delivered on our promises. Our users have always come first, ever since ASSET opened its doors 20 years ago.
Over the last year-and-a-half or more, we’ve made many key investments to improve our user experience and deliver the tools users need when they’re starting up a new design. Here are some of our more significant investments:
- For our best-in-class SourcePoint™ debugger, we’ve ensured that all of our new hardware probes support the latest technology from both Intel® and ARM®. Two key examples of this are our timely delivery of support for Intel’s latest architecture and ARMv8 64-bit cores, which are currently being integrated into ARM’s SoC partners’ devices, such as Applied Micro’s X-Gene processor.
- Cost-effective access to our tools has always been a high priority for us. So, we moved SourcePoint to a subscription model that unlocks its debug and trace tools for broader use by engineers across the enterprise.
- New breakthroughs in hardware validation are on the way. We are integrating the underlying technology of our ScanWorks® platform for embedded instruments with SourcePoint to enable a better performing HSIO validation tool for Intel silicon. Watch for this during the second half of 2015. We’re doing this in concert with our longtime strategic collaborator Intel so that our HSIO tool remains best-in-class.
- We’ve all seen how many cores and peripherals are being integrated into SoCs these days. As this has happened, debugging complex software has become even more difficult, but also more critical than ever before. As a result, trace technologies have become practically essential to software debug and we have invested significantly in tools for ARM’s System Trace Module (STM) as well as the new Intel Trace Hub to ensure that our users have advanced trace tools.
- One key issue for our users is having the right tools in place at power-on of new silicon. This is a major challenge for us, but we have increased our engineering staff to meet it head-on and deliver on our commitments to users.
- Another critical component of our relationship with users falls squarely on our shoulders. We must continually and pro-actively align with our users’ changing schedules, priorities and needs. To accomplish this, we have transferred ScanWorks’ successful management and support planning strategies to our major SourcePoint user accounts. This process is constantly monitored and reviewed according to an ongoing schedule.
- And lastly, we’ve made a major investment in developing and adding to the extensive eResources section of our website. For example, one of our recently published eBooks shows engineers how to implement an IJTAG network of embedded instruments and ARM’s CoreSight debug and trace architecture in the same SoC. This will maximize a user’s debug capabilities for complex ARM-based SoCs. Our tools are unique in the industry in this regard because we address this from two perspectives: validating and empowering the chip’s architecture of embedded IJTAG instruments, and providing debug tools for both the hardware and software of a new SoC.
These are just a few of the many items we have accomplished since the merger, but we will always have more to tackle when it comes to helping users. We realize that for our users, it’s all about effectively and efficiently bringing up complex, high-quality, enterprise-class systems so they can be shipped to their customers. We’re here to help make that happen.
In this blog, I’ve mentioned a number of technologies, including IJTAG, a relatively new standard for embedded instrumentation. If you’re not familiar with IJTAG yet, our eResources section features the only IJTAG Tutorial based on the approved standard.