Scope: IEEE 1149.1-1990 defines circuitry that may be built into an integrated circuit to assist in the test, maintenance, and support of assembled printed circuit boards. The circuitry includes a standard interface through which instructions and test data are communicated. A set of
test features is defined, including a boundary-scan register, such that the component is able to respond to a minimum set of instructions designed to assist with testing of assembled printed circuit boards.
IEEE 1149.1 is the original standard from the Joint Test Action Group (JTAG) that launched a new generation of test ideas. It allows opens and shorts testing on circuit boards, even when no test points are accessible. In addition to defining the Test Access Port, boundary-scan structural testing and enabling device programming functions, 1149.1 laid the foundation for many dependent standards (visit Standards Corner). The ScanWorks platform supports the 1149.1 standard and its dependent standards. The 2012 update currently in work intends to provide test improvements for complex components being created today and in the foreseeable future. There are also significant improvements in documentation capability, including the introduction of the ability to document test procedures unique to the component.
IEEE Site: http://grouper.ieee.org/groups/1149/1/ ASSET Participant: Adam Ley Current Status: Originally approved in 1990. Revision approved in 2013; currently in process for publication. Articles of Interest: IEEE 1149.1 JTAG and Boundary Scan Tutorial - e-Book IEEE Std 1149.1 (JTAG) Testability Primer - 1997 IEEE P1149.1-2011 - Poster IEEE P1149.1-2012 - Update Return to Standards List
CPU & FPGA Support ScanWorks supports Intel®, ARM®, Freescale™, & other CPUs; Altera®, Xilinx® and Lattice® FPGAs. See the full range