About the Test Data Out (TDO) blog

What’s in a name?

You may be wondering why we’ve called our blog “Test Data Out (TDO)”. Well apart from the fact that we’ll be giving out a lot of hopefully useful information about the validation, test and debug of chips, boards and systems, no doubt many of you will have noticed that this title is also the name of one of the 5 signals required by JTAG interfaces. It’s the line where all those informative bits of test data flow out for your analysis and enlightenment. I guess that explains why we chose it…

But why JTAG?

If your first reaction to our blog’s JTAG-related title is that you think we’re only going to talk about Boundary-Scan Test, you couldn’t be more wrong! We aim to cover all of the latest technologies.

I’m sure you’re aware that the term “JTAG” originates from the Joint Test Action Group that defined the original standard. This was eventually ratified as the IEEE 1149.1 test standard.

While JTAG is often used as a synonym for Boundary-Scan Test, it more accurately defines an access methodology via a Test Access Port or TAP, which implements a state machine to synchronize serially transmitted data. Boundary-Scan Test uses the JTAG access methodology but to function as a test technology it requires much more than JTAG access, including devices that are boundary-scan enabled, boundary-scan circuitry and a software application that can generate appropriate test vectors and analyze the returned results.

JTAG ≠ Boundary-Scan Test

JTAG does not necessarily imply Boundary-Scan Test. Confused? Read on!

Boundary-Scan Test is just one of a number of non-intrusive, embedded-instrumentation technologies that rely on the JTAG access methodology. Processor-Controlled Test and Intel® Interconnect BIST (IBIST) also rely on the same serial JTAG access methodology.

JTAG (or IEEE 1149.1) is simply a standardized serial interface to get data in and out of chips or embedded instruments.

ASSET is driving the movement towards embedded instrumentation for testing chips, boards and systems; away from traditional, intrusive or probe-based technologies. Intrusive test technologies are rapidly losing access to highly integrated chips and boards. And attempting to probe today’s high-speed buses affects their integrity; readings have to be compensated by custom algorithms. This simulation of virtual waveforms is an unnecessary complication when embedded instruments can measure the true nature of the signals within the silicon.

IJTAG will change our world

While the widely-implemented IEEE 1149.1 standard supports multiple test technologies today, the recently ratified IEEE 1149.7 standard provides improved support for future embedded-instrumentation technologies such as IJTAG. Internal JTAG (or Instrument JTAG) is an exciting development that will change the face of our test world. It enables the control of, and data collection from an infinite range of instruments that are embedded in chips. These embedded instruments can be simple temperature and voltage monitors or they could perform complex functions such as those provided by today’s costly oscilloscopes. Read Al Crouch’s post on IEEE 1149.7 and IEEE P1687 to find out what’s going on.

Give us your feedback!

We’re going to do our best to keep you informed of the latest developments in the validation, test and debug of chips, boards and systems. We welcome your comments on any of the blog posts; discussions between well-informed people in our industry, ranging from those defining the standards to those running the tests, can only improve life for us all.