A new eBook from ASSET® InterTech explains how a relatively new industry standard, IEEE 1687 Internal JTAG (IJTAG), provides critical capabilities not found in older standards, such as the IEEE 1149.1 boundary-scan standard, commonly referred to as JTAG, and the IEEE 1500 embedded core test (ECT) standard. The new eBook shows that IJTAG enables the easy integration of intellectual property (IP) at the chip level and how the standard defines a highly scalable on-chip network for embedded IP.
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“The use cases that drove the development of each of these three standards were unique. Engineers need to understand the capabilities that each standard provides and that those capabilities cannot be found in the other two standards, even though there may be some areas of overlap,” said Tim Caffee, ASSET’s vice president of design validation and test. “All three standards are being adopted today because each one was developed to solve a different set of problems. From the discussions I’ve had with engineers, I can see that there is confusion over when each standard should be used. This eBook was created to help educate engineers about the unique capabilities of each standard and where they are complimentary.”
The new eBook is entitled “IJTAG vs JTAG vs IEEE 1500 ECT – Second Edition.” It is free and available now on the ASSET website at http://www.asset-intertech.com/eresources/ijtag-vs-jtag-vs-ieee-1500-ect-technical-tutorial-second-edition
Other informative eBooks, white papers and videos on issues relating to chip, board and system debug, validation and test can be downloaded from the eResources section of the ASSET website at http://www.asset-intertech.com/eResources.
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