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ASSET announces debugging tools to accelerate development of cloud applications based on AppliedMicro's X-Gene Server on a Chip solution

Tue, February 25, 2014
Applied Micro

Developers get greater visibility into multiple software threads running on multicore SoCs with ASSET’s SourcePoint® debugger for ARM®

Richardson, TX, and Sunnyvale, CA – ASSET® InterTech announces the enablement of ASSET’s software debug tools for AppliedMicro®’s X-Gene™ Server on a Chip™ silicon solution, which is being rapidly deployed in the cloud. ASSET, through its ScanWorks® platform for embedded instruments, is the leading supplier of tools for embedded instrumentation.

X-Gene incorporates custom 64-bit ARMv8 processor cores to support a wide range of public and enterprise cloud applications such as web servers, data analytics and storage. The scalable multicore X-Gene SoC is a fully integrated server-on-a-chip solution with custom, enterprise-class ARM cores, large memories and high speed input/output (I/O), including 40Gbps Ethernet, on the same chip, delivering industry-standard performance with a much lower cost of ownership.

“Without the right tools and significant visibility into concurrent code execution, debugging firmware for complex multicore SoCs is more than challenging,” said Larry Osborn, ASSET product manager for software debug and trace tools. “Because of the dependencies among multiple and concurrent firmware threads, isolating the root causes of bugs requires advanced debug and trace tools that will take into account all of the processing that’s going on in the system.”

The ASSET SourcePoint® hardware-assisted debugger, which came to ASSET in its recent acquisition of Arium, gives developers visibility into code execution from the point where the system is reset through the execution of the Unified Extensible Firmware Interface (UEFI). SourcePoint also runs under the Linux operating system and can advantage of its many capabilities.

Embedded developers might also be interested in a recent eBook published by ASSET which describes how to capitalize on the capabilities of ARM’s System Trace Macrocell (STM). Check it out here.