JTAG (Boundary Scan) Testability Checklist:

Chip & Board Testability Assessment Checklist

This document summarizes a checklist of questions to assist testability assessment of a board mostly from a boundary-scan perspective but also from other test perspectives (ICT, FPT, AXI, AOI). The checklist is based on a set of Chip and Board Testability Guidelines, available from the author, also available.

Contents of document

1. Before you start
2. On-Board Devices Checklist
3. Board-Level Checklist

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