ScanWorks^® JTAG Interconnect Repair Station Bundle

Graphical Fault Highlighting

Based on the powerful InterComm Design Browser, ScanWorks’ Graphical Fault Highlighting feature displays to a graphical view of the board layout. Interconnect test reports and Memory Access Verification test reports are linked to the layout view by clicking on a pin or net in the report. In the layout view, cross hairs pinpoint the location of the pin or net where the Design Browser gives you access to all of the available information about that pin and shows you the exact routing of the net connected to the pine pin. You can easily locate the suspected pin on the board being tested and quickly inspect it for obvious defects. In addition, you can cross-highlight the layout view to a schematic view to see the functional logic associated with the pin. The InterComm Design Browser is provided by PTC. Additional information about the InterComm Design Browser is available at PTC’s InterComm Product page.

Optional Products

Interactive Debugger and Scan Analyzer

ScanWorks’ Debugger/Scan Analyzer feature gives you powerful tools to debug tests that were created with macros or as SVF files. At the device, board and system level, the debugger gives you access to boundary-scan cells and registers. You control when the scan operations occur and the values shifted in. You can also observe the results shifted out in either a register view or a pin view. As well, you can single-step macro programs or SVF files to see the results of each scan. The ScanAnalyzer provides either a waveform or a state table view of the execution of a macro program or SVF file. Any miscompares are highlighted, so you can see exactly what lead up to the miscompares.

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