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PRODUCTS

BSDL Services:
BSDL Validation Service
DFT Products:
DFT Analyzer™
ScanWorks®
Boundary-Scan Products:

Interconnect Development Station
Interconnect Repair Station
Test Development Station
Diagnostic & Repair Station
Manufacturing Station
Programming Stations
IEEE 1149.6
Emergency License Tokens
Hardware Overview

IBIST Products:
ScanWorks® Intel® IBIST
Emulation Products:
MicroMaster
ICT Products:
ScanWorks® for Agilent's Medalist ICT
Technology:
Test Automation
System-Level JTAG


 

ScanWorks® JTAG Interconnect Pin-Level Diagnostics

Product Overview

ScanWorks® interconnect pin-level diagnostics provides an easy-to-use and effective means of identifying manufacturing defect faults discovered during interconnect testing. Building on the standard diagnostic capabilities of ScanWorks, the pin-level diagnostic software provides detailed fault diagnosis down to the pin and device level. The interconnect pin-level diagnostics detects and reports all common error types, such as different stuck-at conditions and bridging faults. In addition, the report provides an indication of additional fault types, such as opens and bad bi-directional cells.

Test Vector Creation

The first step in producing good diagnostics is creating correct test vectors. Vectors must be generated correctly to properly identify failures and isolate faults. Generation of the interconnect vectors is provided using the ScanWorks Development Stations’ automatic interconnect test vector generation capability.

Test Vector Application

After the test vectors have been created, use any of the ScanWorks Stations to apply the vectors to your unit being tested. During application, ScanWorks requires the actual response vectors from the unit being tested. The response vectors can be analyzed immediately or saved for diagnosis at an offline Repair station.

Interconnect Diagnostics

Most defects found in board manufacturing processes are open and short in the interconnect structures between devices. These defects can be detected and diagnosed using interconnect pin-level diagnostics. An interconnect structure starts with one or more driver scan cells in one device and terminates with one or more receiver scan cells in other devices. Between the driver and receiver cells lie the internal bond wires, driver and receiver amplifiers, pins, solder connections, and external wiring connections. The detectable faults and diagnostic accuracy vary according to the structure.

Single Driver, Single Receiver

This is the simplest form of interconnect. Typical defects are net stuck-open or net shorted to power or ground anywhere between the drivers scan cell and the receiver scan cell. The stuck-open is detected at the receiver as a stuck-at-1 or stuck-at-0 fault, depending on technology. The short is detected as a stuck-at-1 (short-to-power) or stuck-at-0 (short-to-ground). Diagnosis of the short will be to the net, but not to the driver or receiver end of the net.

Single Driver, Multiple Receivers (Fan Out)

If an open or short exists at the driver end of the interconnect net, these faults are detected at all receivers and diagnosed as per the single driver/single receiver case. An open at one of the receivers is detected and located at that receiver as a stuck-at fault. A short to power or ground is detected by all receivers as either stuck-at-0 or stuck-at-1. Diagnosis of the short is to the net-to-net connection.

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