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IEEE 1149.6
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System-Level JTAG


 

ScanWorks® with IEEE 1149.6 High-Speed Interface Testing

Product Overview

ASSET with its ScanWorks environment has been a pioneer in boundary-scan testing and programming based on the original JTAG standard, IEEE 1149.1. Now ScanWorks has been extended to support the latest boundary scan technology for the testing of high-speed interfaces and buses such as Gigabit Ethernet, Fibre Channel, LVDS and others.

The IEEE 1149.6 Standard for Boundary Scan Testing of Advanced Digital Networks “defines an extension to IEEE 1149.1-2001 to standardize the boundary-scan structures and methods required to ensure simple, robust and minimally intrusive boundary scan testing of advanced digital networks not adequately addressed by existing standards, especially those networks that are AC-coupled, differential, or both, in parallel with IEEE 1149.1 testing of conventional digital networks and in conjunction with IEEE 1149.4 testing of conventional analog networks.” The ScanWorks IEEE 1149.6 High-Speed Interface Testing feature adds the testing of 1149.6-compliant devices to the already robust interconnect testing features found in ScanWorks, increasing test coverage for nets that cannot be fully tested with 1149.1 techniques.

AC-Coupled Nets

Many board and system designers are using high-speed serial interfaces in place of wide, parallel data buses for communication between devices and boards. These high-speed serial interfaces transfer data at rates in the range of one or more gigabits per second (Gbps), requiring considerable care in the design and layout of the circuit board and often requiring AC-coupling and differential signaling for reliable communications. An AC-coupled net cannot be adequately tested with standard 1149.1 boundary scan because 1149.1 was developed for DC-coupled nets and, as a result, an 1149.1-compliant scan path can not transfer logic levels through an AC coupling. The IEEE 1149.6 standard defines a method for transferring logic levels across an AC coupling, enabling the generation of test patterns for shorts and opens on an AC-coupled net or net pairs. Refer to the IEEE std. 1149.6 Boundary Scan Testing of Advanced Digital Networks at http://grouper.ieee.org/groups/1149/6/ for more details.

IEEE 1149.6 Support in ScanWorks

ScanWorks supports 1149.6 as an optional feature that can be incorporated into any ScanWorks interconnect action, making the implementation of 1149.6 tests practically transparent to the user. The same design description, netlist and constraint definitions that contribute to 1149.1 interconnect tests also are used by 1149.6 interconnect tests. However, separate interconnect actions are required for 1149.1-based tests and 1149.6-based tests. The separate actions allow the coupling capacitors to be treated as transparent devices for AC testing and as an open for DC testing. Although separate interconnect actions are required for 1149.1 and 1149.6 tests, the test coverage obtained from both types of actions, along with other selected actions, is combined in a comprehensive ScanWorks test coverage report.

To create an interconnect test for a board or system with 1149.6-compliant devices, an existing DC interconnect action can be copied to a new interconnect action name. The BSDL files for the IEEE 1149.6 devices in the design description must include the 1149.6 feature descriptions. The user then selects the “Generate 1149.6 Tests” option in ScanWorks’ interconnect development dialog and clicks on the “Build” button. ScanWorks automatically detects the nets with 1149.6 boundary-scan cells and creates the appropriate tests for shorts and opens.

ScanWorks has several features in its Device Browser and Node Browser that simplify the generation of 1149.6 tests. For example, a serial capacitor is represented by a different symbol than a bypass capacitor so they can be easily distinguished. In addition, in the “Node Browser – Define Constraints Dialog,” pins that share an AC select cell are readily identified. An option is also provided that sets a time delay between test operations to allow for the propagation of a test signal through an AC coupling.

 

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