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ScanWorks® JTAG Flash Memory Program
Generation 
Product Overview
Several methods are used to program flash devices after they
have been assembled onto a board. Each has advantages and
disadvantages, but only on-board programming with JTAG is
fast, convenient, and can be used throughout a product’s life
cycle. On-board programming with boundary scan enables you
to use the same tool to load program data during design verification
and debug, during manufacturing tests, and in the field for
system upgrades. Programming times can approach theoretical
times and file sizes are not the problem they are with other
methods.
Flash Memory Programming with JTAG or Boundary Scan
Flash memories have fairly simple algorithms for writing
and reading data enabling the algorithm to be emulated by
a series of scan operations. These scan operations apply the
address and program data to the appropriate pins and toggle
the control signals at the appropriate time. This requires
the data, address, and control signals to be accessible from
a boundary-scan device, the device to be accessible to a boundary-scan
tool, and the tool to know the sequence of operations needed
to control the flash device.
Several considerations are required when estimating programming
times using JTAG (boundary scan):
- Number of scan operations required
- Length of the boundary-scan path
- Maximum TCK supported by the design
- Amount of data to be loaded

The number of scans needed to write data to
a flash device depends on the device type. Some require only
four scans while other require as many as eight. Controlling
the write enable signal by a non-scan signal can reduce the
number of scans. Reducing the number of scan required from
four to two reduces programming time by approximately 50%.
The length of the scan path can be minimized by the selection
of the device used for access and by placing all other scan
devices in BYPASS. Often there is only one option, allowing
no improvements. The maximum TCK supported is the frequency
supported by the slowest device in the path, or the maximum
frequency supported by the board design. Careful device selection
and board design minimizes programming times. The amount of
data to be loaded is usually not optional, but by carefully
planning the manufacturing flow, you can minimize the impact
on manufacturing throughput.
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