Boundary-Scan Tutorial:

Probing Multi-Layer Boards

The move to surface-mount packaging had a serious impact on the ability to place a nail accurately onto a target test land, as shown in Figure 7. The whole question of access was further compounded by the development of multi-layer boards created to accommodate the increased number of interconnects between all the devices. Basically, the ability to physically probe onto the board with a bed-of-nails system was going away: physical access was becoming limited.

The Emergence of JTAG

Such was the situation in the mid-1980s when a group of concerned test engineers in a number of European electronics systems companies got together to examine the board-test problem of limited access and its possible solutions. The group of people initially called themselves the Joint European Test Action Group (JETAG) . Their preferred method of solution was to bring back the access to device pins by means of an internal serial shift register around the boundary of the device - a boundary scan register.

Later, the group was joined by representatives from North American companies and the ‘E' for “European” was dropped from the title of the organization leaving it Joint Test Action Group, JTAG – see Figure 8. (The author is in the front row, third from the right-hand end.) JTAG did not invent the concept of boundary scan. Several companies, such as IBM, Texas Instruments and Philips, were already working on the idea. What JTAG did was to convert the ideas into an international Standard, the IEEE 1149.1-1990 Standard, first published in April 1990.

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