Boundary-Scan Tutorial:

Boundary Scan Tutorial

A tutorial prepared by Dr R G “Ben” Bennetts
DFT Consultant and Director, ASSET InterTech Inc.

Tel: +44 1489 581276 E-mail: ben@dft.co.uk

Introduction and Objectives

In this tutorial, you will learn the basic elements of boundary-scan architecture — where it came from, what problem it solves, and the implications on the design of an integrated-circuit device.

The core reference is the IEEE 1149.1 Standard:

IEEE Standard 1149.1-2001 “Test Access Port and Boundary-Scan Architecture,” available from the IEEE, 445 Hoes Lane, PO Box 1331, Piscataway, New Jersey 08855-1331, USA. The standard was first published in 1990, revised in 1993 and 1994, and most recently in 2001. You can obtain a copy of the Standard via the world wide web on the IEEE home page at: http://standards.ieee.org/catalog.

The 1993 revision to the standard, referred to as “1149.1a-1993,” contained many clarifications, corrections, and minor enhancements. Two new instructions were introduced in 1149.1a and these are described in this tutorial.

The 1149.1b-1994 supplement contained a description of the Boundary-Scan Description Language (BSDL).

The 1149.1-2001 version contains enhancements to the wording, plus removal of the use of the all-0s code for the Extest instruction. In addition, the mandatory Sample/Preload instruction has been spit into two separate instructions: Preload and Sample, both still mandatory.

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