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Device Modeling Is Critical for
Fast Time-to-Test

By Adam Ley
Chief Technologist
ASSET InterTech, Inc.


Table of Contents
Executive Summary
Starting the Test Generation Process
ScanWorks’ First Pass
Seeking Opens
Iterative Passes
Optimizing Automatic Test Generation


Executive Summary

Automatically generating JTAG tests is a balancing act among the time it takes to develop a test (time-to-test), board safety and test coverage. Over the years, the algorithms behind the ScanWorks® test generator have continued to improve on how non-boundary-scan device models are handled, to the point where test coverage can be optimized in record time without compromising board safety. Through an iterative process involving successive passes of the ScanWorks test generation engine, the test engineer or technician can quickly produce an effective boundary-scan test. The test developer can then decide how best to invest his or her time to optimize the test further.

Starting the Test Generation Process

How ScanWorks’ boundary-scan test-generation engine handles the non-boundary-scan devices in a design is critical to the time it takes to develop a test (time-to-test), the amount of coverage the test will achieve and the safety of the board. Over the years, ScanWorks’ test-generation engine has been improved repeatedly with an eye toward reducing time-to-test with optimal coverage and impeccable board safety. The way that ScanWorks handles cluster (that is, non-boundary-scan) device models plays a major role in this.

A critical goal for ScanWorks is to require as little manual involvement as possible while generating tests with an acceptable level of coverage. After a test has been generated, the user can decide how much effort should be expended to improve the test coverage or to modify other aspects of the test’s operation.

ScanWorks addresses this goal from the very beginning of the boundary scan test development process – the building of a complete description of the design. During this preliminary step, many of the cluster models and BSDL (Boundary Scan Description Language) files may be accessed and automatically downloaded from the device libraries on ScanWorks’ maintenance benefit web pages. In addition, many user organizations maintain their own in-house model libraries from which ScanWorks can automatically extract models and incorporate them into the design description.

It is always a good practice for the test engineer or technician to make sure that all of the passive devices, such as inductors, capacitors, resistors and others have been identified and their models included in the design. As the test developer is reviewing the design, he or she should note other types of cluster devices but they need not go to the trouble of modeling them during the initial design description. Should additional coverage be required later, the developer will already know which device types to consider modeling in order to achieve greater coverage.

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