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Boundary Scan Skews Test Coverage Tradeoffs in your Favor

by Arden Bjerkeli, ASSET InterTech, Inc.
BestTest, (May 2007)

In striving for high-level test coverage in a PCA (printed circuit assembly) factory, it seems most decisions involve tradeoffs. One of the most obvious is test coverage vs. test cost. Diminishing returns on the test coverage effort eventually give way to the escalating cost to achieve the incremental coverage. Through optimization of your test strategy, you can lower your test cost, making headroom for higher coverage.

In the end, the real objective becomes the optimum test plan for a PCA. And that optimum plan would feature the highest test coverage achievable within your cost target. The addition of boundary scan to your test strategy can pull your cost down and raise your test coverage, significantly shifting the point at which test cost will outweigh the need for higher quality.

There are other tradeoffs involved in test plan development. Obviously, the reasons test engineers strive for full test coverage include better manufacturing yields, better quality end products, fewer product returns, competitive advantages in the marketplace and others. But, there are a myriad of reasons – some technical and others financial – why test plans settle for less than full test coverage. This means that the benefits of full test coverage are being traded for some other factor, technical, financial or otherwise.

Optimum vs. Fall Test Coverage

No single test technology is capable of providing full test coverage. This realization has led to the development of a wide variety of techniques for testing PCAs. The challenge for a test strategist is to find a combination of test technologies that result in the most effective test plan, considering not only cost and coverage, but also life-cycle volume, production rate, the product’s design-for–testability features and other factors.

Broadly speaking, test is usually divided into structural or assembly test and functional or system test. Some of the prevalent test technologies can be applied in both areas while others can not. The typical structural test technologies that are most often considered include boundary scan (JTAG or IEEE 1149.1), automated optical inspection (AOI), automated x-ray inspection (AXI), manual visual inspection, in-circuit testers (ICT), manufacturing defect analyzers (MDA) and flying probe testers (FPT). In functional test some of these test technologies are employed in tandem with different test methodologies like system mock-ups, emulation, simulation, self-diagnostics, instrumentation, test executives, rack-and-stack and others. A successful test strategy will employ a combination of several of these technologies

Each of these test technologies and test techniques has its own pro’s and con’s, but since this newsletter is focused on boundary scan, the remainder of this column will focus on how boundary scan can help test engineers achieve optimum test coverage.

Driven by the increasing density of PCAs and the resulting loss of physical access for test probes, boundary scan/JTAG was developed as an access-free test technology. JTAG stimulates and monitors on-board nets and connections via registers in the I/O of digital chips. An external tester controls these registers and analyzes responses by serially shifting test vectors via a JTAG serial bus. Some of the many benefits of JTAG which can optimize test coverage are the following:

1. Non-invasive. No fixtures, no stress on PCA, no test points needed for signal nets.
2. Very high structural test coverage around JTAG devices.
3. Device identity provided by reading embedded registers.
4. Relatively inexpensive.
5. High test development automation.
6. Effective diagnostics to resolve shorts and opens.
7. On-board programming of flash and configuring of CPLDs and FPGAs.

Planning Test Coverage

If test coverage is neglected early on, inadequate test coverage will doggedly follow a product throughout its lifecycle, increasing costs in manufacturing, continuing engineering, support and post-sales warranty returns. Acceptable test coverage doesn’t just happen; it must be planned.

An optimized test plan will take advantage of the complementary coverage capabilities of several test technologies, such as JTAG, visual inspection and ICT. With several technologies included in the plan, the total time-to-test for a product can be distributed over several stations in the manufacturing production line so that no one point restricts the flow of the line. In addition, test planners need not strive for the maximum test coverage that each test technology can provide. Maximizing test coverage for each technology would cause numerous test redundancies throughout the manufacturing process. Shifting some test coverage to JTAG would reduce overall test and manufacturing costs by eliminating test points. This in itself would reduce layout space requirements, reduce fixture procurement costs, reduce fixture maintenance costs and reduce the test load on ICT systems, providing headroom for the unexpected contingency.

Each test technology in the test plan should play to its strength. JTAG test, for instance, is very good at detecting, isolating and diagnosing shorts and opens, as well as performing on-board programming. But boundary scan may not offer adequate coverage where analog devices dominate a section of the PCA. In this case, test points could be designed into the PCA so ICT could complement the design’s JTAG test coverage by providing coverage in the analog partition of the design.