ScanWorks^® JTAG Programming Stations

The ScanWorks Programming Stations (PLD Programming Station or Flash Programming Station) take advantage of JTAG or boundary-scan access to load programs or configuration data into flash memories or programmable logic devices (PLDs) after these devices have been bonded to a printed circuit board (PCB). In-system programming (ISP) or in-system configuration (ISC) operations are optimized on ScanWorks because of the system's high-speeds (up to 50 MHz) and the station's multi-port capabilities, which allows for flash memory programming or logic configuration on as many as four PCBs in parallel.

In-system programming has many benefits during the manufacturing process, but the ScanWorks Programming Station is very valuable during design as well. Some of the benefits of ISP and ISC include the following:

• More efficient manufacturing -- programming is accomplished as an integrated part of the overall manufacturing process.
• Reduced device handling -- Devices are soldered once and programmed or re-programmed on-board.
• Less risk of device damage -- No need to de-solder devices for re-programming.
• Easier inventory control -- Fewer devices to manage because only non-programmed devices are stored inventory, not multiple versions of the same device with different software or data loaded into each version.
• Simpler field upgrades -- Software/firmware can be upgraded in the field through JTAG programming.

The Programming Station MUST include one or more of the following:

• PLD Program Generation
• Flash Memory Program Generation
• NAND Flash Memory Program Generation

Options include:

• Network Licensing

ScanWorks: Speed and Efficiency

The ScanWorks Programming Station includes a number of features that automate the development of programming operations. For example, ScanWorks automatically finds the best JTAG (boundary-scan) access to the targeted device(s) for flash programming. Also, ScanWorks comes with flash device model libraries that eliminate the need to manually define read/write protocols. In addition, the ScanWorks programming station reduces programming times significantly. For example, external access to flash memory's "write enable" and "ready/busy" signals streamlines programming. Moreover, as many as 24 identical boards can be gang programmed through broadcast flash programming and verifying of four boards at once. With test clock (TCK) speeds up to 50 MHz, programming can be accomplished as fast as the PCB will allow.

The ScanWorks Programming Station programs all devices from the major PLD vendors, including Altera, Cypress, Lattice, and Xilinx in any combination, eliminating the need for different programming tools for device each vendor.

For Design or Manufacturing

The ScanWorks Programming Station can be effectively deployed in both design and manufacturing operations. For quick changes during prototype debug, ScanWorks interactive tools can be used to target any PLD in a chain or any flash memory device accessible from a JTAG or boundary-scan device on the chain. The built-in sequencer can program several devices in one operation. And because of its simple application programming interface (API), ScanWorks can be integrated seamlessly into an existing design or manufacturing operation by using popular tools like LabView®, LabWindows/CVI®, HP-VEE™ and Visual Basic, or by using scripting languages like Tcl and Perl. For more efficient process flows in design or manufacturing, ScanWorks programming actions can be integrated into a higher-order sequence of events that includes test actions. In a manufacturing environment, programming operations are executed as part of an integrated test and programming process.

Programming/Configuring PLDs

The ScanWorks Programming Station can be used to program or configure all logic devices from the major PLD vendors, including Altera, Xilinx, Cypress, and Lattice in any combination. ScanWorks is compatible with all of the standards-based programming processes, such as Serial Vector Format (SVF), Jam™, J EDEC's STAPL standard and the IEEE 1532 In-System Configuration standard.

The programming of a FPGA or a complex PLD (CPLD) can be incorporated into a ScanWorks action, which will include all of the programming options and parameters. The action then can be applied whenever it is needed with a single button click or through a ScanWorks API call.

Programming Flash

ScanWorks libraries of flash memory device models simplify the compilation of a programming process by eliminating the need to manually enter data that defines the read and write protocols of the targeted device. All of the tools for efficiently programming flash memory are available with ScanWorks. Some of these include:

• A large library of flash memory device models
• External control of write enable and ready/busy signals for faster programming
• Automatic boundary-scan (JTAG) access detection
• High throughput hardware interfaces to the board being programmed (up to 50 Megabits/sec)
• Broadcast mode for programming and verifying four boards simultaneously
• Interactive read, write and verify operations to verify and debug flash access
• User-controlled write times add to the flexibility of the programming process
• Multiple images of programming files can be loaded during a single programming operation