Speeds up a new product's time-to-market.
Reduces manufacturing and test costs by validating DFT features.
Composed of three tools: Checklist, Design Validation and Test Coverage Analysis.
Checklist ensures testability consistency across the entire organization.
Company-specific rules are easily added.
DFT Analyzer, the industry's first and only JTAG design-for-test tool. DFT Analyzer assists every design engineer in producing comprehensive test coverage like a boundary scan expert even if their knowledge of boundary scan is limited. A series of Yes/No questions walks a design engineer through all of the critical decisions that are necessary to produce a design with comprehensive test coverage. Comprehensive test coverage allows design engineers to debug their new designs in less time.
DFT Analyzer assists test engineers through automated validation of the design’s test coverage. DFT Analyzer even has the ability to recommend changes that will improve test coverage. A rules-based engine allows test engineers to effectively address critical test requirements that will benefit everyone in the product development cycle including PCB Designers, Bring-up Groups (Prototype Labs) and Manufacturing, all before a single prototype is manufactured.
Instead of waiting for prototypes, to see if boundary scan was ‘designed in’ properly, the rules based DFT Analyzer get involved early, during the schematic stage of the design process. After the PCB CAD design is complete, DFT Analyzer can alert you to problems with the embedded boundary scan infrastructure while there is still time to change the board design prior to prototyping. Comprehensive test coverage allows re-programming of devices on the PCB, eliminating expensive prototype re-spins and reducing the development cycle from concept through mass production (i.e. time-to-market).
Generation of a Test Point Reduction Report assists PCB Designers in eliminating unnecessary test points, further reducing manufacturing costs. Although DFT Analyzer is a standalone tool, its output can be imported directly into ScanWorks automatically producing Boundary Scan tests for manufacturing with minimal effort.

DFT Analyzer is made up of three tools which are employed at different stages in product development. First, as schematics are being developed, DFT Analyzer’s automated Checklist queries a designer or test engineer about the testability features included in a design. These questions are based on sound DFT principles derived by ASSET from its many years of working with board designers to optimize boundary-scan test coverage. In addition, design practices specific to the organization can be included in the Checklist to ensure consistency across all of a company’s designs.
Next, DFT Analyzer’s Design Validation tool can be launched after computer aided design (CAD) information has been compiled. With the CAD data that is imported into DFT Analyzer, the Design Validation tool determines whether any pre-established DFT rules have been broken or overlooked. The tool recommends solutions if it encounters a broken rule. Company-specific DFT rules can be added to those already included in DFT Analyzer. New rules are defined in C# programs.
DFT Analyzer’s third tool, Test Coverage Analysis, is engaged during the final stages of design before first prototypes of the board are manufactured. This tool determines the extent of boundary-scan test coverage when certain types of tests, such as interconnect, memory and others, are run on the circuit board. In addition, the report contains information concerning which ICT test points can be eliminated by substituting a boundary-scan test for the ICT process. Eliminating ICT test points saves board space and reduces the complexity and cost of ICT test fixtures. In addition, the Test Coverage Analysis module can output results to the DFT Analyzer’s design browser which graphically displays the available test coverage in a schematic view.
The final output of DFT Analyzer is a complete boundary-scan description of the design that can be imported directly into the ScanWorks test-generation engine. A comprehensive suite of boundary-scan tests can then be generated and optimized for the first prototype boards. Subsequently, this JTAG test suite can be re-used through the manufacturing process as well as system test and field support.

To learn more about DFT Analyzer, talk to one of our experts...
Boundary-Scan Products:
Interconnect Development Station
Emulation Products
ICT Products
ScanWorks for Agilent's Medalist ICT
IBIST Products
Hardware Products